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From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Scott Wood <oss@buserror.net>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v6 15/23] powerpc/8xx: remove special handling of CPU6 errata in set_dec()
Date: Thu,  4 Feb 2016 11:33:31 +0100 (CET)	[thread overview]
Message-ID: <f62197b9173925be4786f932936a5cf160a7e2ec.1454581227.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1454581226.git.christophe.leroy@c-s.fr>

CPU6 ERRATA is now handled directly in mtspr(), so we can use the
standard set_dec() fonction in all cases.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
v2: no change
v3: no change
v4: no change
v5: no change
v6: no change

 arch/powerpc/include/asm/time.h |  6 +-----
 arch/powerpc/kernel/head_8xx.S  | 18 ------------------
 2 files changed, 1 insertion(+), 23 deletions(-)

diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
index 2d7109a..1092fdd 100644
--- a/arch/powerpc/include/asm/time.h
+++ b/arch/powerpc/include/asm/time.h
@@ -31,8 +31,6 @@ extern void tick_broadcast_ipi_handler(void);
 
 extern void generic_calibrate_decr(void);
 
-extern void set_dec_cpu6(unsigned int val);
-
 /* Some sane defaults: 125 MHz timebase, 1GHz processor */
 extern unsigned long ppc_proc_freq;
 #define DEFAULT_PROC_FREQ	(DEFAULT_TB_FREQ * 8)
@@ -166,14 +164,12 @@ static inline void set_dec(int val)
 {
 #if defined(CONFIG_40x)
 	mtspr(SPRN_PIT, val);
-#elif defined(CONFIG_8xx_CPU6)
-	set_dec_cpu6(val - 1);
 #else
 #ifndef CONFIG_BOOKE
 	--val;
 #endif
 	mtspr(SPRN_DEC, val);
-#endif /* not 40x or 8xx_CPU6 */
+#endif /* not 40x */
 }
 
 static inline unsigned long tb_ticks_since(unsigned long tstamp)
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index a268cf4..637f8e9 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -1011,24 +1011,6 @@ _GLOBAL(set_context)
 	SYNC
 	blr
 
-#ifdef CONFIG_8xx_CPU6
-/* It's here because it is unique to the 8xx.
- * It is important we get called with interrupts disabled.  I used to
- * do that, but it appears that all code that calls this already had
- * interrupt disabled.
- */
-	.globl	set_dec_cpu6
-set_dec_cpu6:
-	lis	r7, cpu6_errata_word@h
-	ori	r7, r7, cpu6_errata_word@l
-	li	r4, 0x2c00
-	stw	r4, 8(r7)
-	lwz	r4, 8(r7)
-        mtspr   22, r3		/* Update Decrementer */
-	SYNC
-	blr
-#endif
-
 /*
  * We put a few things here that have to be page-aligned.
  * This stuff goes at the beginning of the data segment,
-- 
2.1.0

  parent reply	other threads:[~2016-02-04 10:33 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-04 10:33 [PATCH v6 00/23] powerpc/8xx: Use large pages for RAM and IMMR and other improvments Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 01/23] powerpc/8xx: Save r3 all the time in DTLB miss handler Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 02/23] powerpc/8xx: Map linear kernel RAM with 8M pages Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 03/23] powerpc: Update documentation for noltlbs kernel parameter Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 04/23] powerpc/8xx: move setup_initial_memory_limit() into 8xx_mmu.c Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 05/23] powerpc32: Fix pte_offset_kernel() to return NULL for bad pages Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 06/23] powerpc32: refactor x_mapped_by_bats() and x_mapped_by_tlbcam() together Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 07/23] powerpc/8xx: Fix vaddr for IMMR early remap Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 08/23] powerpc/8xx: Map IMMR area with 512k page at a fixed address Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 09/23] powerpc/8xx: CONFIG_PIN_TLB unneeded for CONFIG_PPC_EARLY_DEBUG_CPM Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 10/23] powerpc/8xx: map more RAM at startup when needed Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 11/23] powerpc32: Remove useless/wrong MMU:setio progress message Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 12/23] powerpc32: remove ioremap_base Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 13/23] powerpc/8xx: Add missing SPRN defines into reg_8xx.h Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 14/23] powerpc/8xx: Handle CPU6 ERRATA directly in mtspr() macro Christophe Leroy
2016-02-04 10:33 ` Christophe Leroy [this message]
2016-02-04 10:33 ` [PATCH v6 16/23] powerpc/8xx: rewrite set_context() in C Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 17/23] powerpc/8xx: rewrite flush_instruction_cache() " Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 18/23] powerpc: add inline functions for cache related instructions Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 19/23] powerpc32: Remove clear_pages() and define clear_page() inline Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 20/23] powerpc32: move xxxxx_dcache_range() functions inline Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 21/23] powerpc: Simplify test in __dma_sync() Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 22/23] powerpc32: small optimisation in flush_icache_range() Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 23/23] powerpc32: Remove one insn in mulhdu Christophe Leroy

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