From: Palmer Dabbelt <palmer@dabbelt.com>
To: Christoph Hellwig <hch@lst.de>
Cc: linux-ia64@vger.kernel.org, linux-sh@vger.kernel.org,
zippel@linux-m68k.org, linux-mips@vger.kernel.org,
linux-mm@kvack.org, sparclinux@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-arch@vger.kernel.org,
linux-c6x-dev@linux-c6x.org, linux-hexagon@vger.kernel.org,
x86@kernel.org, linux-xtensa@linux-xtensa.org,
Arnd Bergmann <arnd@arndb.de>,
jeyu@kernel.org, linux-um@lists.infradead.org,
linux-m68k@lists.linux-m68k.org, openrisc@lists.librecores.org,
linux-arm-kernel@lists.infradead.org, monstr@monstr.eu,
linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org,
linux-fsdevel@vger.kernel.org, akpm@linux-foundation.org,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 19/31] riscv: use asm-generic/cacheflush.h
Date: Tue, 12 May 2020 16:00:26 -0700 (PDT) [thread overview]
Message-ID: <mhng-8adbedbc-0f91-4291-9471-2df5eb7b802b@palmerdabbelt-glaptop1> (raw)
In-Reply-To: <20200510075510.987823-20-hch@lst.de>
On Sun, 10 May 2020 00:54:58 PDT (-0700), Christoph Hellwig wrote:
> RISC-V needs almost no cache flushing routines of its own. Rely on
> asm-generic/cacheflush.h for the defaults.
>
> Also remove the pointless __KERNEL__ ifdef while we're at it.
> ---
> arch/riscv/include/asm/cacheflush.h | 62 ++---------------------------
> 1 file changed, 3 insertions(+), 59 deletions(-)
>
> diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
> index c8677c75f82cb..a167b4fbdf007 100644
> --- a/arch/riscv/include/asm/cacheflush.h
> +++ b/arch/riscv/include/asm/cacheflush.h
> @@ -8,65 +8,6 @@
>
> #include <linux/mm.h>
>
> -#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
> -
> -/*
> - * The cache doesn't need to be flushed when TLB entries change when
> - * the cache is mapped to physical memory, not virtual memory
> - */
> -static inline void flush_cache_all(void)
> -{
> -}
> -
> -static inline void flush_cache_mm(struct mm_struct *mm)
> -{
> -}
> -
> -static inline void flush_cache_dup_mm(struct mm_struct *mm)
> -{
> -}
> -
> -static inline void flush_cache_range(struct vm_area_struct *vma,
> - unsigned long start,
> - unsigned long end)
> -{
> -}
> -
> -static inline void flush_cache_page(struct vm_area_struct *vma,
> - unsigned long vmaddr,
> - unsigned long pfn)
> -{
> -}
> -
> -static inline void flush_dcache_mmap_lock(struct address_space *mapping)
> -{
> -}
> -
> -static inline void flush_dcache_mmap_unlock(struct address_space *mapping)
> -{
> -}
> -
> -static inline void flush_icache_page(struct vm_area_struct *vma,
> - struct page *page)
> -{
> -}
> -
> -static inline void flush_cache_vmap(unsigned long start, unsigned long end)
> -{
> -}
> -
> -static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
> -{
> -}
> -
> -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
> - do { \
> - memcpy(dst, src, len); \
> - flush_icache_user_range(vma, page, vaddr, len); \
> - } while (0)
> -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
> - memcpy(dst, src, len)
> -
> static inline void local_flush_icache_all(void)
> {
> asm volatile ("fence.i" ::: "memory");
> @@ -79,6 +20,7 @@ static inline void flush_dcache_page(struct page *page)
> if (test_bit(PG_dcache_clean, &page->flags))
> clear_bit(PG_dcache_clean, &page->flags);
> }
> +#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
>
> /*
> * RISC-V doesn't have an instruction to flush parts of the instruction cache,
> @@ -105,4 +47,6 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
> #define SYS_RISCV_FLUSH_ICACHE_LOCAL 1UL
> #define SYS_RISCV_FLUSH_ICACHE_ALL (SYS_RISCV_FLUSH_ICACHE_LOCAL)
>
> +#include <asm-generic/cacheflush.h>
> +
> #endif /* _ASM_RISCV_CACHEFLUSH_H */
Thanks!
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
Were you trying to get these all in at once, or do you want me to take it into
my tree?
next prev parent reply other threads:[~2020-05-12 23:02 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-10 7:54 sort out the flush_icache_range mess Christoph Hellwig
2020-05-10 7:54 ` [PATCH 01/31] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig
2020-05-10 7:54 ` [PATCH 02/31] arm64: fix the flush_icache_range arguments in machine_kexec Christoph Hellwig
2020-05-11 7:51 ` Will Deacon
2020-05-11 11:00 ` Catalin Marinas
2020-05-11 15:15 ` Christoph Hellwig
2020-05-10 7:54 ` [PATCH 03/31] MIPS: unexport __flush_icache_user_range Christoph Hellwig
2020-05-11 16:01 ` Thomas Bogendoerfer
2020-05-10 7:54 ` [PATCH 04/31] nds32: unexport flush_icache_page Christoph Hellwig
2020-05-10 7:54 ` [PATCH 05/31] powerpc: unexport flush_icache_user_range Christoph Hellwig
2020-05-10 7:54 ` [PATCH 06/31] unicore32: remove flush_cache_user_range Christoph Hellwig
2020-05-10 7:54 ` [PATCH 07/31] asm-generic: fix the inclusion guards for cacheflush.h Christoph Hellwig
2020-05-10 7:54 ` [PATCH 08/31] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig
2020-05-10 7:54 ` [PATCH 09/31] asm-generic: improve the flush_dcache_page stub Christoph Hellwig
2020-05-10 7:54 ` [PATCH 10/31] alpha: use asm-generic/cacheflush.h Christoph Hellwig
2020-05-10 7:54 ` [PATCH 11/31] arm64: " Christoph Hellwig
2020-05-10 7:54 ` [PATCH 12/31] c6x: " Christoph Hellwig
2020-05-10 7:54 ` [PATCH 13/31] hexagon: " Christoph Hellwig
2020-05-10 7:54 ` [PATCH 14/31] ia64: " Christoph Hellwig
2020-05-10 7:54 ` [PATCH 15/31] microblaze: " Christoph Hellwig
2020-05-10 7:54 ` [PATCH 16/31] m68knommu: " Christoph Hellwig
2020-05-12 14:44 ` Greg Ungerer
2020-05-10 7:54 ` [PATCH 17/31] openrisc: " Christoph Hellwig
2020-05-10 7:54 ` [PATCH 18/31] powerpc: " Christoph Hellwig
2020-05-10 7:54 ` [PATCH 19/31] riscv: " Christoph Hellwig
2020-05-12 23:00 ` Palmer Dabbelt [this message]
2020-05-13 6:23 ` Christoph Hellwig
2020-05-10 7:54 ` [PATCH 20/31] arm,sparc,unicore32: remove flush_icache_user_range Christoph Hellwig
2020-05-10 7:55 ` [PATCH 21/31] mm: rename flush_icache_user_range to flush_icache_user_page Christoph Hellwig
2020-05-11 7:36 ` Geert Uytterhoeven
2020-05-10 7:55 ` [PATCH 22/31] asm-generic: add a flush_icache_user_range stub Christoph Hellwig
2020-05-10 7:55 ` [PATCH 23/31] sh: implement flush_icache_user_range Christoph Hellwig
2020-05-10 7:55 ` [PATCH 24/31] xtensa: " Christoph Hellwig
2020-05-10 7:55 ` [PATCH 25/31] arm: rename flush_cache_user_range to flush_icache_user_range Christoph Hellwig
2020-05-10 7:55 ` [PATCH 26/31] m68k: implement flush_icache_user_range Christoph Hellwig
2020-05-11 7:38 ` Geert Uytterhoeven
2020-05-10 7:55 ` [PATCH 27/31] exec: only build read_code when needed Christoph Hellwig
2020-05-10 7:55 ` [PATCH 28/31] exec: use flush_icache_user_range in read_code Christoph Hellwig
2020-05-10 7:55 ` [PATCH 29/31] binfmt_flat: use flush_icache_user_range Christoph Hellwig
2020-05-12 14:46 ` Greg Ungerer
2020-05-10 7:55 ` [PATCH 30/31] nommu: use flush_icache_user_range in brk and mmap Christoph Hellwig
2020-05-10 7:55 ` [PATCH 31/31] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig
2020-05-11 7:40 ` Geert Uytterhoeven
2020-05-11 15:11 ` Christoph Hellwig
2020-05-11 15:24 ` Geert Uytterhoeven
2020-05-11 16:37 ` Christoph Hellwig
2020-05-11 7:46 ` sort out the flush_icache_range mess Geert Uytterhoeven
2020-05-11 15:13 ` Christoph Hellwig
2020-05-11 15:25 ` Geert Uytterhoeven
2020-05-11 16:35 ` Christoph Hellwig
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