From: Christopher Lameter <cl@linux.com>
To: Atish Patra <atish.patra@wdc.com>
Cc: linux-riscv@lists.infradead.org,
Albert Ou <aou@eecs.berkeley.edu>,
Jason Cooper <jason@lakedaemon.net>,
Alan Kao <alankao@andestech.com>,
Dmitriy Cherkasov <dmitriy@oss-tech.org>,
Anup Patel <anup@brainfault.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Johan Hovold <johan@kernel.org>,
linux-kernel@vger.kernel.org, Palmer Dabbelt <palmer@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Andreas Schwab <schwab@suse.de>,
Marc Zyngier <marc.zyngier@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Guenter Roeck <linux@roeck-us.net>
Subject: Re: [v5 PATCH 5/8] RISC-V: Compare cpuid with NR_CPUS before mapping.
Date: Thu, 14 Feb 2019 17:59:09 +0000 [thread overview]
Message-ID: <01000168ed298ba3-fea3ca2b-436b-4ce6-a0df-cebe727bf55c-000000@email.amazonses.com> (raw)
In-Reply-To: <1550089092-28783-6-git-send-email-atish.patra@wdc.com>
On Wed, 13 Feb 2019, Atish Patra wrote:
> --- a/arch/riscv/kernel/smpboot.c
> +++ b/arch/riscv/kernel/smpboot.c
> @@ -66,6 +66,11 @@ void __init setup_smp(void)
> found_boot_cpu = 1;
> continue;
> }
> + if (cpuid >= NR_CPUS) {
Use nr_cpu_ids instead? Its initialized to NR_CPUS but can be restricted
if we can determine on boot how many processor we truly have.
next prev parent reply other threads:[~2019-02-14 17:59 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-13 20:18 [v5 PATCH 0/8] Various SMP related fixes Atish Patra
2019-02-13 20:18 ` [v5 PATCH 1/8] RISC-V: Do not wait indefinitely in __cpu_up Atish Patra
2019-02-13 20:18 ` [v5 PATCH 2/8] RISC-V: Move cpuid to hartid mapping to SMP Atish Patra
2019-02-13 20:18 ` [v5 PATCH 3/8] RISC-V: Remove NR_CPUs check during hartid search from DT Atish Patra
2019-02-13 20:18 ` [v5 PATCH 4/8] RISC-V: Allow hartid-to-cpuid function to fail Atish Patra
2019-02-13 20:18 ` [v5 PATCH 5/8] RISC-V: Compare cpuid with NR_CPUS before mapping Atish Patra
2019-02-14 17:59 ` Christopher Lameter [this message]
2019-02-14 23:33 ` Atish Patra
2019-02-13 20:18 ` [v5 PATCH 6/8] clocksource/drivers/riscv: Add required checks during clock source init Atish Patra
2019-02-14 10:24 ` Daniel Lezcano
2019-02-14 18:21 ` Atish Patra
2019-02-13 20:18 ` [v5 PATCH 7/8] irqchip/irq-sifive-plic: Check and continue in case of an invalid cpuid Atish Patra
2019-02-13 20:18 ` [v5 PATCH 8/8] RISC-V: Assign hwcap as per comman capabilities Atish Patra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=01000168ed298ba3-fea3ca2b-436b-4ce6-a0df-cebe727bf55c-000000@email.amazonses.com \
--to=cl@linux.com \
--cc=alankao@andestech.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atish.patra@wdc.com \
--cc=daniel.lezcano@linaro.org \
--cc=dmitriy@oss-tech.org \
--cc=jason@lakedaemon.net \
--cc=johan@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux@roeck-us.net \
--cc=marc.zyngier@arm.com \
--cc=palmer@sifive.com \
--cc=paul.walmsley@sifive.com \
--cc=schwab@suse.de \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).