From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD678C433EF for ; Tue, 19 Oct 2021 09:06:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A189F60FF2 for ; Tue, 19 Oct 2021 09:06:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234700AbhJSJJB convert rfc822-to-8bit (ORCPT ); Tue, 19 Oct 2021 05:09:01 -0400 Received: from eu-smtp-delivery-151.mimecast.com ([185.58.85.151]:25616 "EHLO eu-smtp-delivery-151.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229930AbhJSJI7 (ORCPT ); Tue, 19 Oct 2021 05:08:59 -0400 Received: from AcuMS.aculab.com (156.67.243.121 [156.67.243.121]) (Using TLS) by relay.mimecast.com with ESMTP id uk-mta-250-8TNOiqasOU63UmYEpcjisA-1; Tue, 19 Oct 2021 10:06:41 +0100 X-MC-Unique: 8TNOiqasOU63UmYEpcjisA-1 Received: from AcuMS.Aculab.com (fd9f:af1c:a25b:0:994c:f5c2:35d6:9b65) by AcuMS.aculab.com (fd9f:af1c:a25b:0:994c:f5c2:35d6:9b65) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Tue, 19 Oct 2021 10:06:40 +0100 Received: from AcuMS.Aculab.com ([fe80::994c:f5c2:35d6:9b65]) by AcuMS.aculab.com ([fe80::994c:f5c2:35d6:9b65%12]) with mapi id 15.00.1497.023; Tue, 19 Oct 2021 10:06:40 +0100 From: David Laight To: 'Michael Matz' , Willy Tarreau CC: Borislav Petkov , Ammar Faizi , Paul Walmsley , Palmer Dabbelt , Albert Ou , Linux Kernel Mailing List , Andy Lutomirski , "Thomas Gleixner" , Ingo Molnar , "x86@kernel.org" , "H. Peter Anvin" Subject: RE: [PATCH] tools/nolibc: x86: Remove `r8`, `r9` and `r10` from the clobber list Thread-Topic: [PATCH] tools/nolibc: x86: Remove `r8`, `r9` and `r10` from the clobber list Thread-Index: AQHXwE7LTncX5QIgaEymHCfZB5yMpqvaDgyA Date: Tue, 19 Oct 2021 09:06:40 +0000 Message-ID: <01650203956e4f13adf1feed85fc36a3@AcuMS.aculab.com> References: <20211012222311.578581-1-ammar.faizi@students.amikom.ac.id> <20211013125142.GD5485@1wt.eu> <20211013140723.GE5485@1wt.eu> <20211013142433.GB8557@1wt.eu> In-Reply-To: Accept-Language: en-GB, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.202.205.107] MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=C51A453 smtp.mailfrom=david.laight@aculab.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: aculab.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Michael Matz > Sent: 13 October 2021 17:24 > > Hello, > > On Wed, 13 Oct 2021, Willy Tarreau wrote: > > > On Wed, Oct 13, 2021 at 04:20:55PM +0200, Borislav Petkov wrote: > > > On Wed, Oct 13, 2021 at 04:07:23PM +0200, Willy Tarreau wrote: > > > > Yes I agree with the "potentially" here. If it can potentially be (i.e. > > > > the kernel is allowed by contract to later change the way it's currently > > > > done) then we have to save them even if it means lower code efficiency. > > > > > > > > If, however, the kernel performs such savings on purpose because it is > > > > willing to observe a stricter saving than the AMD64 ABI, we can follow > > > > it but only once it's written down somewhere that it is by contract and > > > > will not change. > > > > > > Right, and Micha noted that such a change to the document can be done. > > > > great. > > > > > And we're basically doing that registers restoring anyway, in POP_REGS. > > > > That's what I based my analysis on when I wanted to verify Ammar's > > finding. I would tend to think that if we're burning cycles popping > > plenty of registers it's probably for a reason, maybe at least a good > > one, which is that it's the only way to make sure we're not leaking > > internal kernel data! This is not a concern for kernel->kernel nor > > user->user calls but for user->kernel calls it definitely is one, and > > I don't think we could relax that series of pop without causing leaks > > anyway. > > It might also be interesting to know that while the wording of the psABI > was indeed intended to imply that all argument registers are potentially > clobbered (like with normal calls) glibc's inline assembler to call > syscalls relies on most registers to actually be preserved: > > # define REGISTERS_CLOBBERED_BY_SYSCALL "cc", "r11", "cx" > ... > #define internal_syscall6(number, arg1, arg2, arg3, arg4, arg5, arg6) \ > ({ \ > unsigned long int resultvar; \ > TYPEFY (arg6, __arg6) = ARGIFY (arg6); \ > TYPEFY (arg5, __arg5) = ARGIFY (arg5); \ > TYPEFY (arg4, __arg4) = ARGIFY (arg4); \ > TYPEFY (arg3, __arg3) = ARGIFY (arg3); \ > TYPEFY (arg2, __arg2) = ARGIFY (arg2); \ > TYPEFY (arg1, __arg1) = ARGIFY (arg1); \ > register TYPEFY (arg6, _a6) asm ("r9") = __arg6; \ > register TYPEFY (arg5, _a5) asm ("r8") = __arg5; \ > register TYPEFY (arg4, _a4) asm ("r10") = __arg4; \ > register TYPEFY (arg3, _a3) asm ("rdx") = __arg3; \ > register TYPEFY (arg2, _a2) asm ("rsi") = __arg2; \ > register TYPEFY (arg1, _a1) asm ("rdi") = __arg1; \ > asm volatile ( \ > "syscall\n\t" \ > : "=a" (resultvar) \ > : "0" (number), "r" (_a1), "r" (_a2), "r" (_a3), "r" (_a4), \ > "r" (_a5), "r" (_a6) \ > : "memory", REGISTERS_CLOBBERED_BY_SYSCALL); \ > (long int) resultvar; \ > }) > > > Note in particular the missing clobbers or outputs of any of the argument > regs. What about all the AVX registers? These are normally caller-saved - so are unlikely to be live in a gcc stub. But glibc is unlikely to keep the clobber list up do date - even if they were ever added. While the kernel can't return 'junk' in the AVX registers, it may be significantly cheaper to zero the registers on at least some code paths. The same is true for the rxx registers. Executing 'xor %rxx,%rxx' is faster than 'pop $rxx'. Especially since the xor cam all be execute in parallel. David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)