From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755514AbbETRW5 (ORCPT ); Wed, 20 May 2015 13:22:57 -0400 Received: from mga09.intel.com ([134.134.136.24]:50165 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755473AbbETRWx convert rfc822-to-8bit (ORCPT ); Wed, 20 May 2015 13:22:53 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,465,1427785200"; d="scan'208";a="697887848" From: "Yang, Fei" To: Mark Brown , "Zha, Qipeng" CC: "linux-kernel@vger.kernel.org" , "Zhong, Huiquan" , "Chen, Jason CJ" , "Zheng, Qi" Subject: RE: [PATCH] regmap: add virtual PMIC IPC bus support Thread-Topic: [PATCH] regmap: add virtual PMIC IPC bus support Thread-Index: AQHQe3+/Jgx/xoYcK0Ow1OcZtR3wtp2Bi7ng//+wpYCAAanGkIAB/HZLgABiD3A= Date: Wed, 20 May 2015 17:22:51 +0000 Message-ID: <02E7334B1630744CBDC55DA85862258349301CAD@ORSMSX102.amr.corp.intel.com> References: <1429573138-68002-1-git-send-email-qipeng.zha@intel.com> <20150518112109.GZ2761@sirena.org.uk> <20150519120915.GJ2761@sirena.org.uk> <20150520110413.GE21577@sirena.org.uk> In-Reply-To: <20150520110413.GE21577@sirena.org.uk> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.22.254.139] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >> The detail is >> Beside pmic core driver itself, there are many pmic function device >> dirvers, such as gpio, theremal, charger, bcu ..., will use this regmap api to access registers. > This sounds like this is a single device, not a generic bus. Well, yes this is more like a bridge to the PMIC instead of a generic bus. In the latest Intel SoC design, the IA core doesn't have direct access to the I2C bus which PMIC is connected to. Instead, there is a PMC controlling the I2C host and talking to PMIC directly. In the meantime PMC runs a firmware providing IPC interface to the IA core. So for IA to access PMIC registers, it has to go through these IPC commands. In order to fit the regmap architecture, the IPC is treated as a bus here so that the PMIC drivers can be Implemented in the same way as others.