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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.gmail.com with ESMTPSA id g25sm9998041ejh.61.2020.11.10.01.10.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Nov 2020 01:10:04 -0800 (PST) To: "Luck, Tony" , Jim Mattson Cc: Qian Cai , "linux-kernel@vger.kernel.org" , "linux-tip-commits@vger.kernel.org" , Boris Petkov , Borislav Petkov , x86 , "kvm@vger.kernel.org" References: <20201030190807.GA13884@agluck-desk2.amr.corp.intel.com> <160431588828.397.16468104725047768957.tip-bot2@tip-bot2> <3f863634cd75824907e8ccf8164548c2ef036f20.camel@redhat.com> From: Paolo Bonzini Subject: Re: [tip: ras/core] x86/mce: Enable additional error logging on certain Intel CPUs Message-ID: <03cfc157-efac-ac4a-2924-d455f29e6ecd@redhat.com> Date: Tue, 10 Nov 2020 10:10:03 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Maybe no contract ... but a bunch of places (many of them in Intel > specific code) that check for it Interestingly, quite a few of them are actually checking for HYPERVISOR not because of missing hypervisor features, but rather because hypervisors don't have to work around certain errata. :) Full analysis after my sig, but tl;dr: the only case of using HYPERVISOR before using MSRs are in arch/x86/events/intel/cstate.c and arch/x86/events/intel/uncore.c. There are some workarounds in drivers/gpu that might fall into a similar bucket. But as far as MSRs go, the way to go overwhelmingly seems to be {rd,wr}msrl_safe. Thanks, Paolo On 10/11/20 00:36, Luck, Tony wrote: > arch/x86/events/core.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) { Print a slightly less frightening warning. > arch/x86/events/intel/core.c: if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) Working around KVM's ignore_msrs=1 option (and quite ugly; shows that the option shouldn't be enabled by default). > arch/x86/events/intel/core.c: int assume = 3 * !boot_cpu_has(X86_FEATURE_HYPERVISOR); Seems unnecessary. > arch/x86/events/intel/cstate.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) > arch/x86/events/intel/uncore.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) Too complicated. :) > arch/x86/kernel/apic/apic.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) Hypervisors don't have errata. > arch/x86/kernel/cpu/bugs.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) > arch/x86/kernel/cpu/bugs.c: else if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) > arch/x86/kernel/cpu/bugs.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) { > arch/x86/kernel/cpu/bugs.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) { > arch/x86/kernel/cpu/intel.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) Print different vulnerability status in sysfs. > arch/x86/kernel/cpu/mshyperv.c: if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) > arch/x86/kernel/cpu/vmware.c: * If !boot_cpu_has(X86_FEATURE_HYPERVISOR), vmware_hypercall_mode > arch/x86/kernel/cpu/vmware.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) { > arch/x86/kernel/jailhouse.c: !boot_cpu_has(X86_FEATURE_HYPERVISOR)) > arch/x86/kernel/kvm.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) > arch/x86/kernel/paravirt.c: if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) Obviously needed before using paravirt features of the hypervisor. > arch/x86/kernel/tsc.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR) || Disables ART in VMs. Probably the idea is that ART does not have an offset field similar to the TSC's, but it's not necessary. Looking at the hypervisor-provided CPUID should be enough. > arch/x86/mm/init_64.c: if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) { Tweaks hotplug heuristics, no MSRs involved. > drivers/acpi/processor_idle.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) Avoids pointless hypervisor exit on idle (i.e. just an optimization). > drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h: return boot_cpu_has(X86_FEATURE_HYPERVISOR); Work around SR-IOV bugs. > drivers/gpu/drm/i915/i915_memcpy.c: !boot_cpu_has(X86_FEATURE_HYPERVISOR)) Work around KVM deficiency. > drivers/gpu/drm/radeon/radeon_device.c: return boot_cpu_has(X86_FEATURE_HYPERVISOR); Work around SR-IOV bugs. > drivers/visorbus/visorchipset.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) { Needed before using paravirt features of the hypervisor.