From: <Conor.Dooley@microchip.com>
To: <Conor.Dooley@microchip.com>, <jassisinghbrar@gmail.com>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>
Cc: <Daire.McNamara@microchip.com>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH 1/3] dt-bindings: mailbox: fix the mpfs' reg property
Date: Fri, 5 Aug 2022 13:01:00 +0000 [thread overview]
Message-ID: <04b697b5-d344-0191-f511-c0f8e0c247ef@microchip.com> (raw)
In-Reply-To: <20220805125618.733628-2-conor.dooley@microchip.com>
On 05/08/2022 13:56, Conor Dooley wrote:
> The "data" region of the PolarFire SoC's system controller mailbox is
> not one continuous register space - the system controller's QSPI sits
> between the control and data registers. Split the "data" reg into two
> parts: "data" & "control".
>
> Fixes: 213556235526 ("dt-bindings: soc/microchip: update syscontroller compatibles")
I omitted the second fixes tag:
Fixes: ed9543d6f2c4 ("dt-bindings: add bindings for polarfire soc mailbox")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../bindings/mailbox/microchip,mpfs-mailbox.yaml | 15 +++++++++++----
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
> index 082d397d3e89..935937c67133 100644
> --- a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
> +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
> @@ -14,9 +14,15 @@ properties:
> const: microchip,mpfs-mailbox
>
> reg:
> - items:
> - - description: mailbox data registers
> - - description: mailbox interrupt registers
> + oneOf:
> + - items:
> + - description: mailbox control & data registers
> + - description: mailbox interrupt registers
> + deprecated: true
> + - items:
> + - description: mailbox control registers
> + - description: mailbox interrupt registers
> + - description: mailbox data registers
>
> interrupts:
> maxItems: 1
> @@ -39,7 +45,8 @@ examples:
> #size-cells = <2>;
> mbox: mailbox@37020000 {
> compatible = "microchip,mpfs-mailbox";
> - reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>;
> + reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>,
> + <0x0 0x37020800 0x0 0x100>;
> interrupt-parent = <&L1>;
> interrupts = <96>;
> #mbox-cells = <1>;
next prev parent reply other threads:[~2022-08-05 13:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 12:56 [PATCH 0/3] MPFS mailbox fixes Conor Dooley
2022-08-05 12:56 ` [PATCH 1/3] dt-bindings: mailbox: fix the mpfs' reg property Conor Dooley
2022-08-05 13:01 ` Conor.Dooley [this message]
2022-08-08 7:01 ` Krzysztof Kozlowski
2022-08-05 12:56 ` [PATCH 2/3] mailbox: mpfs: fix handling of the " Conor Dooley
2022-08-05 12:56 ` [PATCH 3/3] mailbox: mpfs: account for mbox offsets while sending Conor Dooley
2022-08-23 18:41 ` [PATCH 0/3] MPFS mailbox fixes Conor.Dooley
2022-08-23 18:44 ` Jassi Brar
2022-08-23 18:46 ` Conor.Dooley
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