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Subject: Re: [PATCH v1 2/7] dt-bindings: spi: Add Tegra QSPI device tree
 binding
From:   Sowjanya Komatineni <skomatineni@nvidia.com>
To:     Rob Herring <robh@kernel.org>
CC:     <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
        <broonie@kernel.org>, <linux-spi@vger.kernel.org>,
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On 12/9/20 12:28 PM, Sowjanya Komatineni wrote:
>
> On 12/9/20 9:26 AM, Rob Herring wrote:
>> On Tue, Dec 01, 2020 at 01:12:43PM -0800, Sowjanya Komatineni wrote:
>>> This patch adds YAML based device tree binding document for Tegra
>>> QSPI driver.
>>>
>>> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
>>> ---
>>> =C2=A0 .../devicetree/bindings/spi/nvidia,tegra-qspi.yaml | 77=20
>>> ++++++++++++++++++++++
>>> =C2=A0 1 file changed, 77 insertions(+)
>>> =C2=A0 create mode 100644=20
>>> Documentation/devicetree/bindings/spi/nvidia,tegra-qspi.yaml
>>>
>>> diff --git=20
>>> a/Documentation/devicetree/bindings/spi/nvidia,tegra-qspi.yaml=20
>>> b/Documentation/devicetree/bindings/spi/nvidia,tegra-qspi.yaml
>>> new file mode 100644
>>> index 0000000..038a085
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra-qspi.yaml
>>> @@ -0,0 +1,77 @@
>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/spi/nvidia,tegra-qspi.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Tegra Quad SPI Controller
>>> +
>>> +maintainers:
>>> +=C2=A0 - Thierry Reding <thierry.reding@gmail.com>
>>> +=C2=A0 - Jonathan Hunter <jonathanh@nvidia.com>
>>> +
>>> +properties:
>>> +=C2=A0 compatible:
>>> +=C2=A0=C2=A0=C2=A0 enum:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - nvidia,tegra210-qspi
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - nvidia,tegra186-qspi
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - nvidia,tegra194-qspi
>>> +
>>> +=C2=A0 reg:
>>> +=C2=A0=C2=A0=C2=A0 items:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - description: QSPI registers
>> Just 'maxItems: 1'
>>
>>> +
>>> +=C2=A0 interrupts:
>>> +=C2=A0=C2=A0=C2=A0 maxItems: 1
>>> +
>>> +=C2=A0 clock-names:
>>> +=C2=A0=C2=A0=C2=A0 items:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: qspi
>> Kind of a pointless name.
> Thanks Rob for feedback. Do you mean to change name something like=20
> qspi-clk instead of qspi?

Rob, reason I added clock name is later when we add ddr mode we will=20
have additional clock.

So driver uses clock name to retrieve.

Will add both clocks to dt-binding doc in v2 although support for ddr=20
mode in qspi driver can be implemented later.

>>
>>> +
>>> +=C2=A0 clocks:
>>> +=C2=A0=C2=A0=C2=A0 maxItems: 1
>>> +
>>> +=C2=A0 reset-names:
>>> +=C2=A0=C2=A0=C2=A0 minItems: 1
>>> +=C2=A0=C2=A0=C2=A0 items:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: qspi
>> Same here.
>>
>>> +
>>> +=C2=A0 resets:
>>> +=C2=A0=C2=A0=C2=A0 maxItems: 1
>>> +
>>> +=C2=A0 dmas:
>>> +=C2=A0=C2=A0=C2=A0 maxItems: 2
>>> +
>>> +=C2=A0 dma-names:
>>> +=C2=A0=C2=A0=C2=A0 items:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: rx
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: tx
>>> +
>>> +required:
>>> +=C2=A0 - compatible
>>> +=C2=A0 - reg
>>> +=C2=A0 - interrupts
>>> +=C2=A0 - clock-names
>>> +=C2=A0 - clocks
>>> +=C2=A0 - reset-names
>>> +=C2=A0 - resets
>>> +
>>> +additionalProperties: true
>>> +
>>> +examples:
>>> +=C2=A0 - |
>>> +=C2=A0=C2=A0=C2=A0 #include <dt-bindings/clock/tegra210-car.h>
>>> +=C2=A0=C2=A0=C2=A0 #include <dt-bindings/reset/tegra210-car.h>
>>> +=C2=A0=C2=A0=C2=A0 #include <dt-bindings/interrupt-controller/arm-gic.=
h>
>>> +
>>> +=C2=A0=C2=A0=C2=A0 spi@70410000 {
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 com=
patible =3D "nvidia,tegra210-qspi";
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 reg=
 =3D <0x70410000 0x1000>;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int=
errupts =3D <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clo=
cks =3D <&tegra_car TEGRA210_CLK_QSPI>;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clo=
ck-names =3D "qspi";
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 res=
ets =3D <&tegra_car 211>;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 res=
et-names =3D "qspi";
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dma=
s =3D <&apbdma 5>, <&apbdma 5>;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dma=
-names =3D "rx", "tx";
>>> +=C2=A0=C2=A0=C2=A0 };
>>> --=20
>>> 2.7.4
>>>