From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35C96C43441 for ; Fri, 16 Nov 2018 09:55:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 08D0220892 for ; Fri, 16 Nov 2018 09:55:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 08D0220892 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389452AbeKPUGq (ORCPT ); Fri, 16 Nov 2018 15:06:46 -0500 Received: from mail.bootlin.com ([62.4.15.54]:40709 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727442AbeKPUGq (ORCPT ); Fri, 16 Nov 2018 15:06:46 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 9F6FE20756; Fri, 16 Nov 2018 10:55:09 +0100 (CET) Received: from collins (220.107.128.77.rev.sfr.net [77.128.107.220]) by mail.bootlin.com (Postfix) with ESMTPSA id 4FB9920510; Fri, 16 Nov 2018 10:55:09 +0100 (CET) Message-ID: <0629767b61b22a7cc8ba8b51ab9e347ca06bbbb0.camel@bootlin.com> Subject: Re: [PATCH 08/15] ARM/arm64: sunxi: Move H3/H5 syscon label over to soc-specific nodes From: Paul Kocialkowski To: Chen-Yu Tsai , Maxime Ripard Cc: Linux Media Mailing List , devicetree , linux-kernel , linux-arm-kernel , devel@driverdev.osuosl.org, Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Greg Kroah-Hartman , linux-sunxi@googlegroups.com, Hans Verkuil , Sakari Ailus , Thomas Petazzoni Date: Fri, 16 Nov 2018 10:56:28 +0100 In-Reply-To: References: <20181115145013.3378-1-paul.kocialkowski@bootlin.com> <20181115145013.3378-9-paul.kocialkowski@bootlin.com> <20181116093904.4ikn7ldksrm3mp5d@flea> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.30.2 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Le vendredi 16 novembre 2018 à 17:47 +0800, Chen-Yu Tsai a écrit : > On Fri, Nov 16, 2018 at 5:39 PM Maxime Ripard wrote: > > On Thu, Nov 15, 2018 at 03:50:06PM +0100, Paul Kocialkowski wrote: > > > Now that we have specific nodes for the H3 and H5 system-controller > > > that allow proper access to the EMAC clock configuration register, > > > we no longer need a common dummy syscon node. > > > > > > Switch the syscon label over to each platform's dtsi file. > > > > > > Signed-off-by: Paul Kocialkowski > > > --- > > > arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- > > > arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ------ > > > arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 2 +- > > > 3 files changed, 2 insertions(+), 8 deletions(-) > > > > > > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi > > > index 7157d954fb8c..b337a9282783 100644 > > > --- a/arch/arm/boot/dts/sun8i-h3.dtsi > > > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi > > > @@ -134,7 +134,7 @@ > > > }; > > > > > > soc { > > > - system-control@1c00000 { > > > + syscon: system-control@1c00000 { > > > compatible = "allwinner,sun8i-h3-system-control"; > > > reg = <0x01c00000 0x1000>; > > > #address-cells = <1>; > > > diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi > > > index 4b1530ebe427..9175ff0fb59a 100644 > > > --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi > > > +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi > > > @@ -152,12 +152,6 @@ > > > }; > > > }; > > > > > > - syscon: syscon@1c00000 { > > > - compatible = "allwinner,sun8i-h3-system-controller", > > > - "syscon"; > > > - reg = <0x01c00000 0x1000>; > > > - }; > > > - > > > > You're also dropping the syscon compatible there. But I'm not sure how > > it could work with the H3 EMAC driver that would overwrite the > > compatible already. > > I assume you are referring to the previous patch? The node names are not > the same, hence the previous patch is adding another node for the system > controller, and this patch removes the old one with the "syscon" compatible. > > We already patched the EMAC driver to support the new SRAM controller based > regmap, so other than making people unhappy about having to update their > DT, I don't think there would be any problems. This also means H3 in -next > currently has _two_ syscon nodes. Yes, the point is indeed to only have a single node per platform (in the platform dtsi) instead of two (one in the common h3-h5 dtsi and one in the platform dtsi). I guess updating the dt is not even a hard requirement after this series: things will keep working with the dummy syscon node for giving the EMAC driver access to the syscon registers. Cheers, Paul