From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752627AbdHGJEm convert rfc822-to-8bit (ORCPT ); Mon, 7 Aug 2017 05:04:42 -0400 Received: from smtp-out4.electric.net ([192.162.216.184]:56137 "EHLO smtp-out4.electric.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752500AbdHGJEk (ORCPT ); Mon, 7 Aug 2017 05:04:40 -0400 From: David Laight To: "'Casey Leedom'" , "Raj, Ashok" CC: Ding Tianhong , Alexander Duyck , Alex Williamson , Sinan Kaya , "bhelgaas@google.com" , "helgaas@kernel.org" , "Michael Werner" , Ganesh GR , "asit.k.mallick@intel.com" , "patrick.j.cramer@intel.com" , "Suravee.Suthikulpanit@amd.com" , "Bob.Shaw@amd.com" , "l.stach@pengutronix.de" , "amira@mellanox.com" , "gabriele.paoloni@huawei.com" , "jeffrey.t.kirsher@intel.com" , "catalin.marinas@arm.com" , "will.deacon@arm.com" , "mark.rutland@arm.com" , "robin.murphy@arm.com" , "davem@davemloft.net" , "linux-arm-kernel@lists.infradead.org" , "netdev@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linuxarm@huawei.com" Subject: RE: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported Thread-Topic: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported Thread-Index: AQHS++OWrGKhofvtIUCheprjRIXqU6JSQPmAgABHnoCAANEhgIAL8fcAgAPZDQCAA1q+dYAAcmoAgAEXs4CAAJoQgIAI088DgAD2rYCAAjftE4AAD/WAgAAHgwCABAJhcA== Date: Mon, 7 Aug 2017 09:04:19 +0000 Message-ID: <063D6719AE5E284EB5DD2968C1650D6DD004C785@AcuExch.aculab.com> References: <67be791f-e0cf-8284-9229-17174dc741ef@codeaurora.org> <5f9b8bfb-41a8-a17c-6fea-581aec1d5573@huawei.com> <20170724090516.2e0f0d2a@w520.home> <75213fca-4522-2297-3cb8-338e643d3552@huawei.com> <14218972-553d-eb60-0207-460ac7f4b064@huawei.com> <20170803083153.GB4883@otc-nc-03> ,<20170804202141.GA39054@otc-nc-03> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.202.99.200] Content-Type: text/plain; charset="Windows-1252" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-Outbound-IP: 156.67.243.126 X-Env-From: David.Laight@ACULAB.COM X-Proto: esmtps X-Revdns: X-HELO: AcuExch.aculab.com X-TLS: TLSv1:AES128-SHA:128 X-Authenticated_ID: X-PolicySMART: 3396946, 3397078 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Casey Leedom > Sent: 04 August 2017 21:49 ... > Whenever our Hardware Designers implement new functionality in our hardware, > they almost always put in A. several "knobs" which can control fundamental > parameters of the new Hardware Feature, and B. a mechanism of completely > disabling it if necessary. This stems from the incredibly long Design -> > Deployment cyle for Hardware (as opposed to the edit->compile->run cycle for s! Indeed, I'd also expect there to be an undocumented flag to turn it on (broken) in earlier parts to allow testing. David