From: <Tudor.Ambarus@microchip.com>
To: <p.yadav@ti.com>, <miquel.raynal@bootlin.com>, <richard@nod.at>,
<vigneshr@ti.com>, <linux-mtd@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Cc: <nsekhar@ti.com>, <boris.brezillon@collabora.com>
Subject: Re: [PATCH v14 07/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode
Date: Thu, 1 Oct 2020 07:52:36 +0000 [thread overview]
Message-ID: <07af5100-55b5-4f51-ef5b-1e7a69b3607b@microchip.com> (raw)
In-Reply-To: <20200930185732.6201-8-p.yadav@ti.com>
On 9/30/20 9:57 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Some controllers, like the cadence qspi controller, have trouble reading
> only 1 byte in DTR mode. So, do 2 byte reads for SR and FSR commands in
> DTR mode, and then discard the second byte.
>
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> drivers/mtd/spi-nor/core.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 1465cf80f978..73a26e7e32c2 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -370,7 +370,7 @@ int spi_nor_write_disable(struct spi_nor *nor)
> * spi_nor_read_sr() - Read the Status Register.
> * @nor: pointer to 'struct spi_nor'.
> * @sr: pointer to a DMA-able buffer where the value of the
> - * Status Register will be written.
> + * Status Register will be written. Should be at least 2 bytes.
> *
> * Return: 0 on success, -errno otherwise.
> */
> @@ -388,6 +388,11 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
> if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
> op.addr.nbytes = nor->params->rdsr_addr_nbytes;
> op.dummy.nbytes = nor->params->rdsr_dummy;
> + /*
> + * We don't want to read only one byte in DTR mode. So,
> + * read 2 and then discard the second byte.
> + */
> + op.data.nbytes = 2;
> }
>
> spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> @@ -408,7 +413,8 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
> * spi_nor_read_fsr() - Read the Flag Status Register.
> * @nor: pointer to 'struct spi_nor'
> * @fsr: pointer to a DMA-able buffer where the value of the
> - * Flag Status Register will be written.
> + * Flag Status Register will be written. Should be at least 2
> + * bytes.
> *
> * Return: 0 on success, -errno otherwise.
> */
> @@ -426,6 +432,11 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
> if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
> op.addr.nbytes = nor->params->rdsr_addr_nbytes;
> op.dummy.nbytes = nor->params->rdsr_dummy;
> + /*
> + * We don't want to read only one byte in DTR mode. So,
> + * read 2 and then discard the second byte.
> + */
> + op.data.nbytes = 2;
> }
>
> spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> --
> 2.28.0
>
next prev parent reply other threads:[~2020-10-01 7:52 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 18:57 [PATCH v14 00/15] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP Pratyush Yadav
2020-10-01 7:19 ` Tudor.Ambarus
2020-10-01 7:34 ` Pratyush Yadav
2020-10-01 7:50 ` Miquel Raynal
2020-10-01 8:18 ` Tudor.Ambarus
2020-10-01 10:50 ` Vignesh Raghavendra
2020-09-30 18:57 ` [PATCH v14 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg,write_reg,erase}() Pratyush Yadav
2020-10-01 7:21 ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 03/15] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-10-01 7:46 ` Tudor.Ambarus
2020-10-01 8:37 ` Pratyush Yadav
2020-10-01 8:49 ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 04/15] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 05/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-10-01 7:49 ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 06/15] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-10-01 7:50 ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 07/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-10-01 7:52 ` Tudor.Ambarus [this message]
2020-09-30 18:57 ` [PATCH v14 08/15] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-10-01 8:09 ` Tudor.Ambarus
2020-10-01 8:42 ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 09/15] mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 10/15] mtd: spi-nor: Parse SFDP SCCR Map Pratyush Yadav
2020-10-01 8:20 ` Tudor.Ambarus
2020-10-01 11:56 ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 11/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-10-01 8:21 ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 12/15] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-10-01 8:23 ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 13/15] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-10-01 8:26 ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-10-01 8:35 ` Tudor.Ambarus
2020-10-01 8:40 ` Pratyush Yadav
2020-10-01 8:50 ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 15/15] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-10-01 8:38 ` Tudor.Ambarus
2020-10-01 19:43 ` Pratyush Yadav
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