From: "Hillf Danton" <hillf.zj@alibaba-inc.com>
To: "'Daniel Thompson'" <daniel.thompson@linaro.org>
Cc: "linux-kernel" <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
"'Russell King'" <linux@arm.linux.org.uk>
Subject: Re: [RESEND PATCH 4.0-rc5 v19 3/6] irqchip: gic: Introduce plumbing for IPI FIQ
Date: Wed, 08 Apr 2015 16:19:58 +0800 [thread overview]
Message-ID: <088d01d071d4$cddd9240$6998b6c0$@alibaba-inc.com> (raw)
In-Reply-To: <088701d071d3$ec642a90$c52c7fb0$@alibaba-inc.com>
> +/*
> + * Fully acknowledge (both ack and eoi) any outstanding FIQ-based IPI,
> + * otherwise do nothing.
> + */
> +void gic_handle_fiq_ipi(void)
> +{
> + struct gic_chip_data *gic = &gic_data[0];
> + void __iomem *cpu_base = gic_data_cpu_base(gic);
> + unsigned long irqstat, irqnr;
> +
> + if (WARN_ON(!in_nmi()))
> + return;
> +
> + while ((1u << readl_relaxed(cpu_base + GIC_CPU_HIGHPRI)) &
> + SMP_IPI_FIQ_MASK) {
> + irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
> + writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
> +
> + irqnr = irqstat & GICC_IAR_INT_ID_MASK;
> + WARN_RATELIMIT(irqnr > 16,
> + "Unexpected irqnr %lu (bad prioritization?)\n",
Help more if s/Unexpected/Unexpected FIQ/ ?
> + irqnr);
> + }
> +}
> +
next parent reply other threads:[~2015-04-08 8:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <088701d071d3$ec642a90$c52c7fb0$@alibaba-inc.com>
2015-04-08 8:19 ` Hillf Danton [this message]
2015-04-08 10:23 ` [RESEND PATCH 4.0-rc5 v19 3/6] irqchip: gic: Introduce plumbing for IPI FIQ Daniel Thompson
2015-03-24 16:53 [PATCH 4.0-rc5 v19 0/6] irq/arm: Implement arch_trigger_all_cpu_backtrace Daniel Thompson
2015-04-07 15:37 ` [RESEND PATCH " Daniel Thompson
2015-04-07 15:38 ` [RESEND PATCH 4.0-rc5 v19 3/6] irqchip: gic: Introduce plumbing for IPI FIQ Daniel Thompson
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