From: Marek Vasut <marex@denx.de>
To: Alexandre Torgue <alexandre.torgue@st.com>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>,
Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH v2 0/2] Add GPIO level-sensitive interrupt support
Date: Tue, 18 Feb 2020 19:13:31 +0100 [thread overview]
Message-ID: <088e786c-511e-cf95-fc41-5343b8134407@denx.de> (raw)
In-Reply-To: <32e409e6-d475-802a-6a90-c8ba6c0cf6d5@st.com>
On 2/18/20 7:10 PM, Alexandre Torgue wrote:
> Hi Marek
Hi,
> On 2/18/20 5:25 PM, Marek Vasut wrote:
>> On 2/18/20 2:12 PM, Alexandre Torgue wrote:
>>> This series adds the possibility to handle gpio interrupts on level.
>>>
>>> GPIO hardware block is directly linked to EXTI block but EXTI handles
>>> external interrupts only on edge. To be able to handle GPIO interrupt on
>>> level a "hack" is done in gpio irq chip: parent interrupt (exti irq
>>> chip)
>>> is retriggered following interrupt type and gpio line value.
>>>
>>> In exti irq chip, retrigger ops function is added.
>>
>> btw. this might be unrelated, but is it possible to have e.g. gpioC2 set
>> as trigger-level-low and gpioD2 set as trigger-edge-falling ? It seems
>> 8eb2dfee9fb1 ("pinctrl: stm32: add lock mechanism for irqmux selection")
>> prevents that.
>>
>
> No it's not possible. Each gpio line doesn't have a dedicated Exti line
> Each Exti line is muxing between gpio banks.
OK, that confirms my assumption.
> Mapping is done as following:
>
> EXTI0 = A0 or B0 or C0 .... or Z0 : selected by Mux
> EXTI1 = A1 or B1 or C1 ....or Z1 : selected by Mux
> EXTI2 = A2 or B2 or C2 ....or Z2 : selected by Mux
> ...
Is it at least possible to have IRQs of the same type on the same exti
line? E.g. gpioA2 of trigger-edge-falling and gpioB2 trigger-edge-falling ?
next prev parent reply other threads:[~2020-02-18 18:13 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-18 13:12 [PATCH v2 0/2] Add GPIO level-sensitive interrupt support Alexandre Torgue
2020-02-18 13:12 ` [PATCH v2 1/2] irqchip/stm32: Add irq retrigger support Alexandre Torgue
2020-02-18 17:51 ` Marek Vasut
2020-02-19 11:33 ` Alexandre Torgue
2020-02-19 11:43 ` Marc Zyngier
2020-02-19 13:07 ` Alexandre Torgue
2020-02-19 13:13 ` Marc Zyngier
2020-02-19 13:17 ` Alexandre Torgue
2020-02-18 13:12 ` [PATCH v2 2/2] pinctrl: stm32: Add level interrupt support to gpio irq chip Alexandre Torgue
2020-02-18 17:51 ` Marek Vasut
2020-02-19 11:34 ` Alexandre Torgue
2020-02-19 12:07 ` Marc Zyngier
2020-02-19 12:59 ` Alexandre Torgue
2020-02-18 16:25 ` [PATCH v2 0/2] Add GPIO level-sensitive interrupt support Marek Vasut
2020-02-18 18:10 ` Alexandre Torgue
2020-02-18 18:13 ` Marek Vasut [this message]
2020-02-19 9:20 ` Alexandre Torgue
2020-02-19 17:24 ` Marek Vasut
2020-02-20 13:09 ` Alexandre Torgue
2020-02-21 16:41 ` Marek Vasut
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