From: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
To: "Clément Péron" <peron.clem@gmail.com>
Cc: Rob Herring <robh@kernel.org>,
Tomeu Vizoso <tomeu.vizoso@collabora.com>,
Steven Price <steven.price@arm.com>,
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>,
Viresh Kumar <vireshk@kernel.org>, Nishanth Menon <nm@ti.com>,
Stephen Boyd <sboyd@kernel.org>,
Maxime Ripard <mripard@kernel.org>,
"wens@csie.org" <wens@csie.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v3 13/14] [DO NOT MERGE] arm64: dts: allwinner: h6: Add GPU OPP table
Date: Fri, 10 Jul 2020 15:45:40 +0200 [thread overview]
Message-ID: <0A3B73FE-0732-4024-9729-1FCE02006C27@gmail.com> (raw)
In-Reply-To: <20200709140322.131320-14-peron.clem@gmail.com>
> Wiadomość napisana przez Clément Péron <peron.clem@gmail.com> w dniu 09.07.2020, o godz. 16:03:
>
> Add an Operating Performance Points table for the GPU to
> enable Dynamic Voltage & Frequency Scaling on the H6.
>
> The voltage range is set with minival voltage set to the target
> and the maximal voltage set to 1.2V. This allow DVFS framework to
> work properly on board with fixed regulator.
>
> Signed-off-by: Clément Péron <peron.clem@gmail.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 80 ++++++++++++++++++++
> 1 file changed, 80 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 8f514a2169aa..a69f9e09a829 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -174,6 +174,7 @@ gpu: gpu@1800000 {
> clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
> clock-names = "core", "bus";
> resets = <&ccu RST_BUS_GPU>;
> + operating-points-v2 = <&gpu_opp_table>;
> #cooling-cells = <2>;
> status = "disabled";
> };
> @@ -1036,4 +1037,83 @@ map0 {
> };
> };
> };
> +
> + gpu_opp_table: gpu-opp-table {
> + compatible = "operating-points-v2";
> +
> + opp@216000000 {
> + opp-hz = /bits/ 64 <216000000>;
> + opp-microvolt = <810000 810000 1200000>;
> + };
> +
> + opp@264000000 {
> + opp-hz = /bits/ 64 <264000000>;
> + opp-microvolt = <810000 810000 1200000>;
> + };
> +
> + opp@312000000 {
> + opp-hz = /bits/ 64 <312000000>;
> + opp-microvolt = <810000 810000 1200000>;
> + };
> +
> + opp@336000000 {
> + opp-hz = /bits/ 64 <336000000>;
> + opp-microvolt = <810000 810000 1200000>;
> + };
> +
> + opp@360000000 {
> + opp-hz = /bits/ 64 <360000000>;
> + opp-microvolt = <820000 820000 1200000>;
> + };
> +
> + opp@384000000 {
> + opp-hz = /bits/ 64 <384000000>;
> + opp-microvolt = <830000 830000 1200000>;
> + };
> +
> + opp@408000000 {
> + opp-hz = /bits/ 64 <408000000>;
> + opp-microvolt = <840000 840000 1200000>;
> + };
> +
> + opp@420000000 {
> + opp-hz = /bits/ 64 <420000000>;
> + opp-microvolt = <850000 850000 1200000>;
> + };
> +
> + opp@432000000 {
> + opp-hz = /bits/ 64 <432000000>;
> + opp-microvolt = <860000 860000 1200000>;
> + };
> +
> + opp@456000000 {
> + opp-hz = /bits/ 64 <456000000>;
> + opp-microvolt = <870000 870000 1200000>;
> + };
> +
> + opp@504000000 {
> + opp-hz = /bits/ 64 <504000000>;
> + opp-microvolt = <890000 890000 1200000>;
> + };
> +
> + opp@540000000 {
> + opp-hz = /bits/ 64 <540000000>;
> + opp-microvolt = <910000 910000 1200000>;
> + };
> +
> + opp@576000000 {
> + opp-hz = /bits/ 64 <576000000>;
> + opp-microvolt = <930000 930000 1200000>;
> + };
> +
> + opp@624000000 {
> + opp-hz = /bits/ 64 <624000000>;
> + opp-microvolt = <950000 950000 1200000>;
> + };
> +
> + opp@756000000 {
> + opp-hz = /bits/ 64 <756000000>;
> + opp-microvolt = <1040000 1040000 1200000>;
> + };
> + };
> };
Clement,
I gave run for v3 on H6 GS1 TVbox and what i discovered:
1. I have frequent hard hangs if DVFS is enabled (hard reset required),
2. hangs seems to be related to operating points changing - as limiting OPP table to any single entry (tested on 5 highest OPP ) makes my GS1 stable working,
3. hang seems to be exactly related to OPP changes as having OPP table even with just 2 entries already gives hangs,
4. tunings with <regulator-ramp-delay> makes no difference (tested with 0, 2500 and 25000). Also increasing <regulator-enable-ramp-delay> 2 times up (to 64000) makes no change.
Now I have 2 hypothesis:
a. issue is SW related: software operations in DVFS are somehow "unsafe" at touching hardware (is it possible we have i.e. concurrency issue here?);
b. issue is HW related: i.e. in steep-up OPP, time between sending change Vdd-gpu command to HW for increasing Vdd and sending command to HW for increasing GPU freq is too short.
To investigate further I done following test: limit OPP table to 4 entries+all 4 entries have the same Vdd.
If this test will pass the we know issue is b\.
If it will fail - then issue is a\.
And on my GS1 this test fails....so for me issue is a\ likely….
let me know how i can help!
br
next prev parent reply other threads:[~2020-07-10 13:45 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-09 14:03 [PATCH v3 00/14] Add regulator devfreq support to Panfrost Clément Péron
2020-07-09 14:03 ` [PATCH v3 01/14] drm/panfrost: avoid static declaration Clément Péron
2020-07-09 14:03 ` [PATCH v3 02/14] drm/panfrost: clean headers in devfreq Clément Péron
2020-07-09 14:03 ` [PATCH v3 03/14] drm/panfrost: don't use pfdevfreq.busy_count to know if hw is idle Clément Péron
2020-07-09 14:03 ` [PATCH v3 04/14] drm/panfrost: introduce panfrost_devfreq struct Clément Péron
2020-07-09 14:03 ` [PATCH v3 05/14] drm/panfrost: use spinlock instead of atomic Clément Péron
2020-07-09 14:03 ` [PATCH v3 06/14] drm/panfrost: properly handle error in probe Clément Péron
2020-07-09 14:03 ` [PATCH v3 07/14] drm/panfrost: rename error labels in device_init Clément Péron
2020-07-10 9:05 ` Steven Price
2020-07-09 14:03 ` [PATCH v3 08/14] drm/panfrost: move devfreq_init()/fini() in device Clément Péron
2020-07-10 9:05 ` Steven Price
2020-07-09 14:03 ` [PATCH v3 09/14] drm/panfrost: dynamically alloc regulators Clément Péron
2020-07-09 14:03 ` [PATCH v3 10/14] drm/panfrost: add regulators to devfreq Clément Péron
2020-07-09 14:03 ` [PATCH v3 11/14] arm64: defconfig: Enable devfreq cooling device Clément Péron
2020-07-09 14:03 ` [PATCH v3 12/14] arm64: dts: allwinner: h6: Add cooling map for GPU Clément Péron
2020-07-09 14:03 ` [PATCH v3 13/14] [DO NOT MERGE] arm64: dts: allwinner: h6: Add GPU OPP table Clément Péron
2020-07-10 13:45 ` Piotr Oniszczuk [this message]
2020-07-10 13:50 ` Clément Péron
2020-07-09 14:03 ` [PATCH v3 14/14] [DO NOT MERGE] arm64: dts: allwinner: force GPU regulator to be always Clément Péron
2020-07-09 14:19 ` [PATCH v3 00/14] Add regulator devfreq support to Panfrost Clément Péron
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