From: "Wu, Songjun" <songjun.wu@linux.intel.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Arnd Bergmann <arnd@arndb.de>,
Greg KH <gregkh@linuxfoundation.org>,
Hauke Mehrtens <hauke@hauke-m.de>,
hua.ma@linux.intel.com, yixin.zhu@linux.intel.com,
chuanhua.lei@linux.intel.com, qi-ming.wu@intel.com,
Linux MIPS Mailing List <linux-mips@linux-mips.org>,
linux-clk <linux-clk@vger.kernel.org>,
"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Jiri Slaby <jslaby@suse.com>
Subject: Re: [PATCH v2 14/18] serial: intel: Add CCF support
Date: Mon, 6 Aug 2018 16:58:49 +0800 [thread overview]
Message-ID: <0ab8e6e7-3cc2-8e50-b1f3-99616437f527@linux.intel.com> (raw)
In-Reply-To: <CAMuHMdWY9NuYOXq8sD9wmH48=vhMcSBomRY9ZbC+tGE3PGiTGg@mail.gmail.com>
On 8/6/2018 3:20 PM, Geert Uytterhoeven wrote:
> Hi Songjun,
>
> On Mon, Aug 6, 2018 at 9:15 AM Wu, Songjun <songjun.wu@linux.intel.com> wrote:
>> On 8/5/2018 5:03 AM, Arnd Bergmann wrote:
>>> On Sat, Aug 4, 2018 at 2:43 PM, Greg Kroah-Hartman
>>> <gregkh@linuxfoundation.org> wrote:
>>>> On Sat, Aug 04, 2018 at 12:54:22PM +0200, Hauke Mehrtens wrote:
>>>>> On 08/03/2018 12:30 PM, Greg Kroah-Hartman wrote:
>>>>>> On Fri, Aug 03, 2018 at 03:33:38PM +0800, Wu, Songjun wrote:
>>>>> This patch makes it possible to use it with the legacy lantiq code and
>>>>> also with the common clock framework. I see multiple options to fix this
>>>>> problem.
>>>>>
>>>>> 1. The current approach to have it as a compile variant for a) legacy
>>>>> lantiq arch code without common clock framework and b) support for SoCs
>>>>> using the common clock framework.
>>>>> 2. Convert the lantiq arch code to the common clock framework. This
>>>>> would be a good approach, but it need some efforts.
>>>>> 3. Remove the arch/mips/lantiq code. There are still users of this code.
>>>>> 4. Use the old APIs also for the new xRX500 SoC, I do not like this
>>>>> approach.
>>>>> 5. Move lantiq_soc.h to somewhere in include/linux/ so it is globally
>>>>> available and provide some better wrapper code.
>>>> I don't really care what you do at this point in time, but you all
>>>> should know better than the crazy #ifdef is not allowed to try to
>>>> prevent/allow the inclusion of a .h file. Checkpatch might have even
>>>> warned you about it, right?
>>>>
>>>> So do it correctly, odds are #5 is correct, as that makes it work like
>>>> any other device in the kernel. You are not unique here.
>>> The best approach here would clearly be 2. We don't want platform
>>> specific header files for doing things that should be completely generic.
>>>
>>> Converting lantiq to the common-clk framework obviously requires
>>> some work, but then again the whole arch/mips/lantiq/clk.c file
>>> is fairly short and maybe not that hard to convert.
>>>
>>> >From looking at arch/mips/lantiq/xway/sysctrl.c, it appears that you
>>> already use the clkdev lookup mechanism for some devices without
>>> using COMMON_CLK, so I would assume that you can also use those
>>> for the remaining clks, which would be much simpler. It registers
>>> one anonymous clk there as
>>>
>>> clkdev_add_pmu("1e100c00.serial", NULL, 0, 0, PMU_ASC1);
>>>
>>> so why not add replace that with two named clocks and just use
>>> the same names in the DT for the newer chip?
>>>
>>> Arnd
>> We discussed internally and have another solution for this issue.
>> Add one lantiq.h in the serial folder, and use "#ifdef preprocessor" in
>> lantiq.h,
>> also providing no-op stub functions in the #else case, then call those
>> functions
>> unconditionally from lantiq.c to avoid #ifdef in C file.
>>
>> To support CCF in legacy product is another topic, is not included in
>> this patch.
>>
>> The implementation is as following:
>> #ifdef CONFIG_LANTIQ
>> #include <lantiq_soc.h>
>> #else
>> #define LTQ_EARLY_ASC 0
>> #define CPHYSADDR(_val) 0
>>
>> static inline struct clk *clk_get_fpi(void)
>> {
>> return NULL;
>> }
>> #endif
> Why not use clkdev_add(), as Arnd suggested?
> That would be a 3-line patch without introducing a new header file and an ugly
> #ifdef, which complicates compile coverage testing?
>
> Gr{oetje,eeting}s,
>
> Geert
The reason we add a new head file is also for two macros(LTQ_EARLY_ASC
and CPHYSADDR)
used by legacy product. We need to provide the no-op stub for these two
macro for new product.
next prev parent reply other threads:[~2018-08-06 8:58 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-03 3:02 [PATCH v2 00/18] MIPS: intel: add initial support for Intel MIPS SoCs Songjun Wu
2018-08-03 3:02 ` [PATCH v2 01/18] MIPS: intel: Add " Songjun Wu
2018-08-03 17:49 ` Paul Burton
2018-08-06 9:12 ` Hua Ma
2018-08-03 3:02 ` [PATCH v2 02/18] clk: intel: Add clock driver " Songjun Wu
2018-08-06 15:19 ` Rob Herring
2018-08-08 2:51 ` yixin zhu
2018-08-08 5:50 ` Stephen Boyd
2018-08-08 8:52 ` yixin zhu
2018-08-27 19:09 ` Stephen Boyd
2018-08-29 6:56 ` Zhu, Yi Xin
2018-08-31 17:10 ` Stephen Boyd
2018-09-03 10:47 ` Zhu, Yi Xin
2018-08-29 10:34 ` Zhu, Yi Xin
2018-08-31 17:13 ` Stephen Boyd
2018-09-03 10:52 ` Zhu, Yi Xin
2018-08-03 3:02 ` [PATCH v2 03/18] dt-bindings: clk: Add documentation of grx500 clock controller Songjun Wu
2018-08-06 15:18 ` Rob Herring
2018-08-08 3:08 ` yixin zhu
2018-08-08 14:54 ` Rob Herring
2018-08-03 3:02 ` [PATCH v2 04/18] MIPS: dts: Add initial support for Intel MIPS SoCs Songjun Wu
2018-08-04 11:11 ` Hauke Mehrtens
2018-08-06 9:20 ` Hua Ma
2018-08-03 3:02 ` [PATCH v2 05/18] dt-binding: MIPS: Add documentation of " Songjun Wu
2018-08-06 15:16 ` Rob Herring
2018-08-03 3:02 ` [PATCH v2 06/18] MIPS: dts: Change upper case to lower case Songjun Wu
2018-08-06 15:14 ` Rob Herring
2018-08-03 3:02 ` [PATCH v2 07/18] MIPS: dts: Add aliases node for lantiq danube serial Songjun Wu
2018-08-03 3:02 ` [PATCH v2 08/18] serial: intel: Get serial id from dts Songjun Wu
2018-08-03 5:43 ` Greg Kroah-Hartman
2018-08-06 9:32 ` Wu, Songjun
2018-08-07 7:33 ` Geert Uytterhoeven
2018-08-08 4:05 ` Wu, Songjun
2018-08-08 8:33 ` Geert Uytterhoeven
2018-08-10 8:13 ` Wu, Songjun
2018-08-03 3:02 ` [PATCH v2 09/18] serial: intel: Change ltq_w32_mask to asc_update_bits Songjun Wu
2018-08-03 3:02 ` [PATCH v2 10/18] MIPS: lantiq: Unselect SWAP_IO_SPACE when LANTIQ is selected Songjun Wu
2018-08-03 3:02 ` [PATCH v2 11/18] serial: intel: Use readl/writel instead of ltq_r32/ltq_w32 Songjun Wu
2018-08-03 3:02 ` [PATCH v2 12/18] serial: intel: Rename fpiclk to freqclk Songjun Wu
2018-08-03 3:02 ` [PATCH v2 13/18] serial: intel: Replace clk_enable/clk_disable with clk generic API Songjun Wu
2018-08-03 3:02 ` [PATCH v2 14/18] serial: intel: Add CCF support Songjun Wu
2018-08-03 5:56 ` Greg Kroah-Hartman
2018-08-03 7:33 ` Wu, Songjun
2018-08-03 10:30 ` Greg Kroah-Hartman
2018-08-04 10:54 ` Hauke Mehrtens
2018-08-04 12:43 ` Greg Kroah-Hartman
2018-08-04 21:03 ` Arnd Bergmann
2018-08-06 7:05 ` Wu, Songjun
2018-08-06 7:20 ` Geert Uytterhoeven
2018-08-06 8:58 ` Wu, Songjun [this message]
2018-08-06 9:29 ` Geert Uytterhoeven
2018-08-07 7:18 ` Wu, Songjun
2018-08-07 7:33 ` Geert Uytterhoeven
2018-08-03 3:02 ` [PATCH v2 15/18] serial: intel: Support more platform Songjun Wu
2018-08-03 5:57 ` Greg Kroah-Hartman
2018-08-03 7:21 ` Wu, Songjun
2018-08-05 8:37 ` Christoph Hellwig
2018-08-06 7:20 ` Wu, Songjun
2018-08-03 3:02 ` [PATCH v2 16/18] serial: intel: Reorder the head files Songjun Wu
2018-08-03 3:02 ` [PATCH v2 17/18] serial: intel: Change init_lqasc to static declaration Songjun Wu
2018-08-03 3:02 ` [PATCH v2 18/18] dt-bindings: serial: lantiq: Add optional properties for CCF Songjun Wu
2018-08-13 17:53 ` Rob Herring
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