From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96B32ECAAD4 for ; Sat, 3 Sep 2022 16:53:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230422AbiICQxo (ORCPT ); Sat, 3 Sep 2022 12:53:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230031AbiICQxk (ORCPT ); Sat, 3 Sep 2022 12:53:40 -0400 Received: from xry111.site (xry111.site [89.208.246.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA35B4B4BE for ; Sat, 3 Sep 2022 09:53:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xry111.site; s=default; t=1662224018; bh=t52IjX6+hBLIxyQMJHaMiz0wEz1Uswpk4fyzMkyIEAw=; h=Subject:From:To:Cc:Date:In-Reply-To:References:From; b=JETq2/CbFjHgWSfUSgGE/9SA/kHRz+tdtSQ7zd+KIjqlcevtKyCZ7MBMrkaA9lU8o GZ6z35DI4ESFeMUlcHz+BP5CyjEaXPhkhYt73hKKS+yJv7iywDVg+3A7BCQmohO11G jafxS/mtZQmRXqoJrBVND2Kd1OM6o4P91jdJjBuE= Received: from localhost.localdomain (xry111.site [IPv6:2001:470:683e::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id DC7C366783; Sat, 3 Sep 2022 12:53:36 -0400 (EDT) Message-ID: <0b2d115c42ff6cb9b8c65d852ec2f0746ca6e8d9.camel@xry111.site> Subject: Re: [PATCH 1/3] LoongArch: tools: Add relocs tool support From: Xi Ruoyao To: Jinyang He , Youling Tang , Huacai Chen Cc: linux-kernel@vger.kernel.org, loongarch@lists.linux.dev, Xuerui Wang , Jiaxun Yang Date: Sun, 04 Sep 2022 00:53:34 +0800 In-Reply-To: References: <1662113335-14282-1-git-send-email-tangyouling@loongson.cn> <1662113335-14282-2-git-send-email-tangyouling@loongson.cn> <4df8a26c49a35c1fce36d80c370f738fa71a2bef.camel@xry111.site> <78a4a6b0970c309daa336a2329e69d28df486552.camel@xry111.site> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.45.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, 2022-09-04 at 00:23 +0800, Jinyang He wrote: > On 2022/9/3 18:49, Xi Ruoyao wrote: >=20 > > On Sat, 2022-09-03 at 09:57 +0800, Youling Tang wrote: > > > > > Unlike (pre-r6) MIPS, LoongArch has a complete support for PIC, a= nd > > > > > currently LoongArch toolchain always produces PIC (except, if -Wa= ,-mla- > > > > > {local,global}-with-abs or la.abs macros are used explicitly). > > > > >=20 > > > > > So would it be easier to review and correct the uses of "la.abs" = in the > > > > > code, and make the main kernel image a real PIE?=C2=A0 Then we ca= n load it > > > > > everywhere w/o any need to do relocation at load time. > > > At the beginning I also wanted to make the main kernel image a real P= IE > > > and tried it, some of the "la.abs" can be modified, but I encountered > > > difficulties in modifying the=C2=A0 exception handling code part, the= kernel > > > will not=C2=A0 boot after modification :(, I will continue to work ha= rd try. > > I just tried the same thing and get the same result :(.=C2=A0 Will spen= d > > several hours reading the LoongArch manual about exception... The reason is the handler code is not executed in linker address, but copied elsewhere. Then PC-relative offset is broken. I managed to work around it by creating a trampoline and jump into the handler, instead of copy the handler code. Then I could remove most "la.abs" occurrence (except two in kernel entry point, which seem deliberately used): - https://github.com/xry111/linux/commit/56a433f - https://github.com/xry111/linux/commit/48203e6 Using the trampoline in handler table will definitely lead to sub- optimal performance. I just use it as a proof-of-concept. Later we may use some assembler trick to generate hard-coded handler table with correct PC-relative offsets. > The following ideas are based on experience, without validation. Patches > show that three types of relocation are needed to be done. > 1, GOT is generated by toolchain, so=C2=A0 I think eliminating them by= =20 > toolchain is better. https://gcc.gnu.org/pipermail/gcc-patches/2022-September/600797.html I stop to read the mail here because it's 00:52 AM now :). > 2, Ex_table is generated but striped relocation info. We can plays pcrel > way to resolve this problem. One of ways like follows, (pseudo-code) /* snip */ --=20 Xi Ruoyao School of Aerospace Science and Technology, Xidian University