From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BE81C43610 for ; Tue, 13 Nov 2018 12:04:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 52844208A3 for ; Tue, 13 Nov 2018 12:04:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 52844208A3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=fi.rohmeurope.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732846AbeKMWCA (ORCPT ); Tue, 13 Nov 2018 17:02:00 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:44651 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726934AbeKMWCA (ORCPT ); Tue, 13 Nov 2018 17:02:00 -0500 Received: by mail-lj1-f196.google.com with SMTP id k19-v6so10552558lji.11; Tue, 13 Nov 2018 04:04:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=RImRPMxGiDv5vU62yzigGgRR9BAH/S5Qm/3HbD/fkag=; b=Bg7k0RRj7WFbKJQuheUMNbmUBlQx8NLUcyLR6ZQS+XUGuY0niM19qC6Px+E7LWs0QZ AbBekf1PSScLyskUrzDhiIJm2vn28hb0iKUTPHxU8drru7zcEzMTH/znAo6Q/bfA++bJ EyJpn6va1aeTOJT0d/Aqz/roIhQ6eV/bsQthdfIU2d8fsDBlt0Q2iR8nq8RAZr357Cwn YSoB47zCZ0bQJpZmLCDlt432c3unu3H1AFpKlas++hgcd47g2EYZA7tp0CZ2dSpRvfVO pQRjefuTtUkosHt6DzfOsXxHjO839nO7ta3ruEebpmhFyDI0uQpPge4r59jWoz6w6O4F 28FA== X-Gm-Message-State: AGRZ1gLalk9iDJIsf3+P2wi89lP/AhpOvbMJHgLbsMPVR0s8EFJ+TmJD obasa+oqkomoL/33C1pP3ok= X-Google-Smtp-Source: AJdET5cC4i998KEUcHfE5HnUebd1JCTKHlAAnG4fmkJTYn2CM265UAt9GiNuJpMeB5durbm4RvfLUg== X-Received: by 2002:a2e:2c02:: with SMTP id s2-v6mr3029104ljs.118.1542110647607; Tue, 13 Nov 2018 04:04:07 -0800 (PST) Received: from localhost.localdomain ([213.255.186.46]) by smtp.gmail.com with ESMTPSA id h3sm1737611lfj.25.2018.11.13.04.04.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 13 Nov 2018 04:04:05 -0800 (PST) Date: Tue, 13 Nov 2018 14:03:51 +0200 From: Matti Vaittinen To: mazziesaccount@gmail.com Cc: Jonathan Corbet , Michael Turquette , Stephen Boyd , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Russell King , Andy Gross , David Brown , Andrey Smirnov , Guenter Roeck , Rob Herring , Sebastian Reichel , Lee Jones , Huang Shijie , Matti Vaittinen , Daniel Kurtz , Akshu Agrawal , "Rafael J. Wysocki" , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Subject: [PATCH v4 8/8] clk: bd718x7: Initial support for ROHM bd71837/bd71847 PMIC clock Message-ID: <0b9b9c9555706c512f21e6105e3e2b67e0a0172f.1542107769.git.matti.vaittinen@fi.rohmeurope.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.2 (2017-12-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ROHM bd71837 and bd71847 contain 32768Hz clock gate. Support the clock using generic clock framework. Signed-off-by: Matti Vaittinen --- drivers/clk/Kconfig | 7 +++ drivers/clk/Makefile | 1 + drivers/clk/clk-bd718x7.c | 131 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 139 insertions(+) create mode 100644 drivers/clk/clk-bd718x7.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 81cdb4eaca07..2dc12bf75b1b 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -283,6 +283,13 @@ config COMMON_CLK_STM32H7 ---help--- Support for stm32h7 SoC family clocks +config COMMON_CLK_BD718XX + tristate "Clock driver for ROHM BD718x7 PMIC" + depends on MFD_ROHM_BD718XX + help + This driver supports ROHM BD71837 and ROHM BD71847 + PMICs clock gates. + source "drivers/clk/actions/Kconfig" source "drivers/clk/bcm/Kconfig" source "drivers/clk/hisilicon/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 72be7a38cff1..a47430b387db 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -21,6 +21,7 @@ endif obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o +obj-$(CONFIG_COMMON_CLK_BD718XX) += clk-bd718x7.o obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o diff --git a/drivers/clk/clk-bd718x7.c b/drivers/clk/clk-bd718x7.c new file mode 100644 index 000000000000..df5f1068ce8e --- /dev/null +++ b/drivers/clk/clk-bd718x7.c @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 ROHM Semiconductors +// bd71837.c -- ROHM BD71837MWV clock driver + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct bd718xx_clk { + struct clk_hw hw; + u8 reg; + u8 mask; + struct platform_device *pdev; + struct bd718xx *mfd; +}; + +static int bd71837_clk_set(struct clk_hw *hw, int status) +{ + struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw); + + return regmap_update_bits(c->mfd->regmap, c->reg, c->mask, status); +} + +static void bd71837_clk_disable(struct clk_hw *hw) +{ + int rv; + struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw); + + rv = bd71837_clk_set(hw, 0); + if (rv) + dev_dbg(&c->pdev->dev, "Failed to disable 32K clk (%d)\n", rv); +} + +static int bd71837_clk_enable(struct clk_hw *hw) +{ + return bd71837_clk_set(hw, 1); +} + +static int bd71837_clk_is_enabled(struct clk_hw *hw) +{ + int enabled; + int rval; + struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw); + + rval = regmap_read(c->mfd->regmap, c->reg, &enabled); + + if (rval) + return rval; + + return enabled & c->mask; +} + +static const struct clk_ops bd71837_clk_ops = { + .prepare = &bd71837_clk_enable, + .unprepare = &bd71837_clk_disable, + .is_prepared = &bd71837_clk_is_enabled, +}; + +static int bd71837_clk_probe(struct platform_device *pdev) +{ + struct bd718xx_clk *c; + int rval = -ENOMEM; + const char *parent_clk; + struct device *parent = pdev->dev.parent; + struct bd718xx *mfd = dev_get_drvdata(parent); + struct clk_init_data init = { + .name = "bd718xx-32k-out", + .ops = &bd71837_clk_ops, + }; + + c = devm_kzalloc(&pdev->dev, sizeof(*c), GFP_KERNEL); + if (!c) + return -ENOMEM; + + init.num_parents = 1; + parent_clk = of_clk_get_parent_name(parent->of_node, 0); + + init.parent_names = &parent_clk; + if (!parent_clk) { + dev_err(&pdev->dev, "No parent clk found\n"); + return -EINVAL; + } + + c->reg = BD718XX_REG_OUT32K; + c->mask = BD718XX_OUT32K_EN; + c->mfd = mfd; + c->pdev = pdev; + c->hw.init = &init; + + of_property_read_string_index(parent->of_node, + "clock-output-names", 0, &init.name); + + rval = devm_clk_hw_register(&pdev->dev, &c->hw); + if (!rval) { + rval = devm_clk_hw_register_clkdev(&pdev->dev, + &c->hw, init.name, NULL); + if (rval) + dev_warn(&pdev->dev, "Failed to register clkdev\n"); + if (parent->of_node) { + rval = devm_of_clk_add_parent_hw_provider(&pdev->dev, + of_clk_hw_simple_get, &c->hw); + if (rval) + dev_err(&pdev->dev, + "adding clk provider failed\n"); + } + } else { + dev_err(&pdev->dev, "failed to register 32K clk"); + } + + return rval; +} + +static struct platform_driver bd71837_clk = { + .driver = { + .name = "bd718xx-clk", + }, + .probe = bd71837_clk_probe, +}; + +module_platform_driver(bd71837_clk); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD71837 chip clk driver"); +MODULE_LICENSE("GPL"); -- 2.14.3 -- Matti Vaittinen ROHM Semiconductors ~~~ "I don't think so," said Rene Descartes. Just then, he vanished ~~~