From: Jiancheng Xue <xuejiancheng@hisilicon.com>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: <mturquette@baylibre.com>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <linux-kernel@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<bin.chen@linaro.org>, <elder@linaro.org>,
<hermit.wangheming@hisilicon.com>, <yanhaifeng@hisilicon.com>,
<wenpan@hisilicon.com>, <howell.yang@hisilicon.com>
Subject: Re: [PATCH 2/2] clk: hisilicon: add CRG driver for Hi3516CV300 SoC
Date: Mon, 14 Nov 2016 09:24:17 +0800 [thread overview]
Message-ID: <0c3b49a4-f58c-253a-fd87-ab52b0b26010@hisilicon.com> (raw)
In-Reply-To: <20161112000415.GE5177@codeaurora.org>
Hi Stephen,
On 2016/11/12 8:04, Stephen Boyd wrote:
> On 10/29, Jiancheng Xue wrote:
>
> Should be a From: Pan Wen here?
>
>> Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
>> Generator) module generates clock and reset signals used
>> by other module blocks on SoC.
>>
>> Signed-off-by: Pan Wen <wenpan@hisilicon.com>
>
> And you should have signed it off? Care to resend or state that
> this is incorrectly attributed to you instead of Pan Wen?
>
Pan Wen is the main author of this patch. I just made some small modification
with agreement from him. Do I need to resend this patch if it's better to add my
signed-off?
Thanks,
Jiancheng
next prev parent reply other threads:[~2016-11-14 1:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-29 6:13 [PATCH 0/2] clk: hisilicon: add CRG driver for Hi3798CV200 and Hi3516CV300 SoCs Jiancheng Xue
2016-10-29 6:13 ` [PATCH 1/2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC Jiancheng Xue
2016-11-12 0:04 ` Stephen Boyd
2016-10-29 6:13 ` [PATCH 2/2] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Jiancheng Xue
2016-10-29 11:36 ` Hao Zhang
2016-10-31 2:05 ` Jiancheng Xue
2016-11-12 0:04 ` Stephen Boyd
2016-11-14 1:24 ` Jiancheng Xue [this message]
2016-11-14 20:03 ` Stephen Boyd
2016-11-15 1:58 ` Jiancheng Xue
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