> I've tried this sort of thing before (unsynchronised cross-modifying code),
> but I had to abandon it due to Pentium III Erratum E49 and similar errata
> for all Intel P6 CPUs. Have you verified that you're not hitting this erratum?
It is indeed completely hitting it.
However, we can work around this by simply stopping all other CPUs in
interrupt context with an IPI (while this may sound horrible, it
shouldn't significantly impact performance unless the response time is
excessively long).

I'll write some code to this. However I don't have the hardware to test
it, so it might require multiple iterations to get it right.

As for the "all Intel P6 CPUs" are really _all_ Intel P6 CPU broken? 
Do you know of any other CPU that would need the workaround?