From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757579AbcLOL4I (ORCPT ); Thu, 15 Dec 2016 06:56:08 -0500 Received: from mailout4.samsung.com ([203.254.224.34]:50055 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755142AbcLOL4E (ORCPT ); Thu, 15 Dec 2016 06:56:04 -0500 X-AuditID: cbfee61a-f79916d0000062de-bd-585284d1e3f8 From: Bartlomiej Zolnierkiewicz To: Krzysztof Kozlowski Cc: Kukjin Kim , Javier Martinez Canillas , Rob Herring , Mark Rutland , Russell King , Doug Anderson , Andreas Faerber , Thomas Abraham , Ben Gamari , Arjun K V , linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] ARM: dts: Add missing CPU frequencies for Exynos5422/5800 Date: Thu, 15 Dec 2016 12:55:59 +0100 Message-id: <10512254.nyUcL0zgTP@amdc3058> User-Agent: KMail/4.13.3 (Linux/3.13.0-96-generic; KDE/4.13.3; x86_64; ; ) MIME-version: 1.0 Content-transfer-encoding: 7Bit Content-type: text/plain; charset=us-ascii X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLIsWRmVeSWpSXmKPExsVy+t9jQd2LLUERBpMXKVg0byq2WL5yF4vF rPl3WSzmHznHanF22UE2izdv1zBZ9D9+zWxx/vwGdotNj6+xWlzeNYfN4nPvEUaLGef3MVkc mrqX0WLp9YtMFq17j7BbdCxjdBDwWDNvDaPH5WsXmT1mN1xk8di0qpPNY/OSeo8t/XfZPfq2 rGL0OPPb2WPz6WqPz5vkArii3GwyUhNTUosUUvOS81My89JtlUJD3HQtlBTyEnNTbZUidH1D gpQUyhJzSoE8IwM04OAc4B6spG+X4JbR80SoYKZ6Rc/uC2wNjAfluxg5OSQETCQmbGpjg7DF JC7cWw9kc3EICcxilHg9bRsLhPOVUWLRhN/MIFVsAlYSE9tXMYLYIgKaEtf/fmcFsZkFlrFI fHieDmILC/hK3Np6GKyeRUBV4u7DC2A1vAJaEs9ebGcHsUUFvCS27GtngogLSvyYfI8FYo68 xL79U6Fmakms33mcaQIj3ywkZbOQlM1CUraAkXkVo0RqQXJBcVJ6rmFearlecWJucWleul5y fu4mRnDUPpPawXhwl/shRgEORiUe3hdCQRFCrIllxZW5hxglOJiVRHivNgOFeFMSK6tSi/Lj i0pzUosPMZoCPTKRWUo0OR+YUPJK4g1NzE3MjQ0szC0tTYyUxHkbZz8LFxJITyxJzU5NLUgt gulj4uCUamDMiHlm2Shr/m2i9N5ejdrvp3la7wSUv1m3y3D2HbeDrPMen2v/JHj/ZtM/bSmO 2IWrfb/5HKmSNtq/z/R+//fzxfI37F4w69bcnHKmWknNuv9KkuwK8Q/c71zkg3Jc7x6bqb5C betTvx/PM+X0sz88ztnWen7awqmHT9ytiVm4cgVbM5/XCZ6HSizFGYmGWsxFxYkAtTsT6fAC AAA= X-MTR: 20000000000000000@CPGS Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP (for A7 cores). Also update common Odroid-XU3 Lite/XU3/XU4 thermal cooling maps to account for new OPPs. Since new OPPs are not available on all Exynos5422/5800 boards modify dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach Pi (limited to 2.0 GHz / 1.3 GHz) accordingly. Tested on Odroid-XU3 and XU3 Lite. Cc: Doug Anderson Cc: Javier Martinez Canillas Cc: Andreas Faerber Cc: Thomas Abraham Cc: Ben Gamari Cc: Arjun K V Signed-off-by: Bartlomiej Zolnierkiewicz --- v2: - added comments about limitations of SoC revisions used by Odroid-XU3 Lite and Peach Pi boards (suggested by Javier) - removed redundant opp_a7_14 label - added Arjun to Cc: Javier, could you test it on Peach Pi board? arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 14 ++++++------- arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 22 +++++++++++++++++++++ arch/arm/boot/dts/exynos5800-peach-pi.dts | 9 ++++++++ arch/arm/boot/dts/exynos5800.dtsi | 15 ++++++++++++++ 4 files changed, 53 insertions(+), 7 deletions(-) Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi =================================================================== --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.365955950 +0100 +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.361955949 +0100 @@ -118,7 +118,7 @@ /* * When reaching cpu_alert3, reduce CPU * by 2 steps. On Exynos5422/5800 that would - * be: 1600 MHz and 1100 MHz. + * (usually) be: 1800 MHz and 1200 MHz. */ map3 { trip = <&cpu_alert3>; @@ -131,16 +131,16 @@ /* * When reaching cpu_alert4, reduce CPU - * further, down to 600 MHz (11 steps for big, - * 7 steps for LITTLE). + * further, down to 600 MHz (13 steps for big, + * 8 steps for LITTLE). */ - map5 { + cooling_map5: map5 { trip = <&cpu_alert4>; - cooling-device = <&cpu0 3 7>; + cooling-device = <&cpu0 3 8>; }; - map6 { + cooling_map6: map6 { trip = <&cpu_alert4>; - cooling-device = <&cpu4 3 11>; + cooling-device = <&cpu4 3 13>; }; }; }; Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts =================================================================== --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.365955950 +0100 +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.361955949 +0100 @@ -21,6 +21,28 @@ compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5"; }; +/* + * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies + * than Odroid XU3/XU4 boards: 1.8 GHz for A15 cores & 1.3 GHz for A7 cores. + * Therefore we need to update OPPs tables and thermal maps accordingly. + */ +&cluster_a15_opp_table { + /delete-node/opp@2000000000; + /delete-node/opp@1900000000; +}; + +&cluster_a7_opp_table { + /delete-node/opp@1400000000; +}; + +&cooling_map5 { + cooling-device = <&cpu0 3 7>; +}; + +&cooling_map6 { + cooling-device = <&cpu4 3 11>; +}; + &pwm { /* * PWM 0 -- fan Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts =================================================================== --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.365955950 +0100 +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.361955949 +0100 @@ -146,6 +146,15 @@ vdd-supply = <&ldo9_reg>; }; +/* + * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores + * (1.3 GHz instead of 1.4 GHz) than Odroid XU3/XU4 boards. Thus we need to + * update A7 OPPs table accordingly. + */ +&cluster_a7_opp_table { + /delete-property/opp@1400000000; +}; + &cpu0 { cpu-supply = <&buck2_reg>; }; Index: b/arch/arm/boot/dts/exynos5800.dtsi =================================================================== --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100 +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100 @@ -24,6 +24,16 @@ }; &cluster_a15_opp_table { + opp@2000000000 { + opp-hz = /bits/ 64 <2000000000>; + opp-microvolt = <1250000>; + clock-latency-ns = <140000>; + }; + opp@1900000000 { + opp-hz = /bits/ 64 <1900000000>; + opp-microvolt = <1250000>; + clock-latency-ns = <140000>; + }; opp@1700000000 { opp-microvolt = <1250000>; }; @@ -85,6 +95,11 @@ }; &cluster_a7_opp_table { + opp@1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt = <1250000>; + clock-latency-ns = <140000>; + }; opp@1300000000 { opp-microvolt = <1250000>; };