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From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: "Nakajima, Jun" <jun.nakajima@intel.com>
Cc: Linus Torvalds <torvalds@osdl.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	"Saxena, Sunil" <sunil.saxena@intel.com>,
	"Mallick, Asit K" <asit.k.mallick@intel.com>,
	"Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com>
Subject: Re: [PATCH] idle using PNI monitor/mwait
Date: 09 Jul 2003 11:59:47 +0100	[thread overview]
Message-ID: <1057748386.6255.10.camel@dhcp22.swansea.linux.org.uk> (raw)
In-Reply-To: <3014AAAC8E0930438FD38EBF6DCEB5640201719C@fmsmsx407.fm.intel.com>

On Maw, 2003-07-08 at 22:23, Nakajima, Jun wrote:
> Hi Linus,
> 
> Attached is a patch that enables PNI (Prescott New Instructions)
> monitor/mwait in kernel idle (opcodes are now public). Basically MWAIT
> is similar to hlt, but you can avoid IPI to wake up the processor
> waiting. A write (by another processor) to the address range specified
> by MONITOR would wake up the processor waiting on MWAIT.

Is mwait dependant on cached cpu memory and the cache exclusivity logic
or directly on the processor. In other words can I use mwait in future
to wait for DMA to hit a given location ? - Im mostly thinking about
debugging uses 


  parent reply	other threads:[~2003-07-09 10:47 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-07-08 21:23 [PATCH] idle using PNI monitor/mwait Nakajima, Jun
2003-07-08 23:34 ` Linus Torvalds
2003-07-09 10:59 ` Alan Cox [this message]
2003-07-09  0:35 Nakajima, Jun
2003-07-09  6:41 ` Zwane Mwaikambo
2003-07-09 16:39 Mallick, Asit K
2003-07-09 17:01 Mallick, Asit K
2003-07-10  1:17 Saxena, Sunil

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