Re: tsc clock issues with dual core and question about irq balancing

[john stultz <johnstul@us.ibm.com>]

On Wed, 2005-12-14 at 12:27 -0800, Adrian Yee wrote:
> Hi John,
> 
> > >>>From your dmesg, you're still running w/ smp, apic, acpi as well.
> > I was curious if you could run just as you had before without issue
> > using "nosmp noapic acpi=off clock=tsc", only drop the clock=tsc bit.
> > 
> > I just want to be sure we're only changing one variable at a time.
> > :)
> 
> I also have a dmesg with those options that I can upload, but I'm not
> completely sure about the validity of the sluggishness "tests" because
> the system felt the same after I booted with the different
> configurations this time around.  ssh seems fine right now, so I guess
> my Internet just happened to go bad at the same time I started play with
> my hardware and kernel configurations.

Hmm. Please keep an eye on this. If there is something going funky
either in accessing the PM Timer hardware on your chipset, or some other
quirk (locking issues, timer starvation, etc) it would be good to
discover.

> I think the only solid problem I've got here is the tsc ocassionally
> counting back.  Is switching to clock=pmtmr the permanent/proper
> solution for this, or is there a bug in the kernel/hardware that should
> be fixable?  Thanks.

If the ACPI PM timer is enabled it should be used by default (is that
not the case? if you do not use clock= at all, what clocksource gets
selected?). Unfortunately using the TSC on some SMP systems is just not
feasible.

thanks
-john