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From: Dario Binacchi <dariobin@libero.it>
To: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: linux-kernel@vger.kernel.org,
	Gianluca Falavigna <gianluca.falavigna@inwind.it>,
	Andrew Lunn <andrew@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>,
	Oliver Hartkopp <socketcan@hartkopp.net>,
	Vincent Mailhol <mailhol.vincent@wanadoo.fr>,
	Wolfgang Grandegger <wg@grandegger.com>,
	linux-can@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [RESEND PATCH 4/4] can: c_can: cache frames to operate as a true FIFO
Date: Thu, 5 Aug 2021 22:12:18 +0200 (CEST)	[thread overview]
Message-ID: <1172393027.218339.1628194339000@mail1.libero.it> (raw)
In-Reply-To: <20210804093423.ms2p245f5oiw4xn4@pengutronix.de>

Hi Marc,

> Il 04/08/2021 11:34 Marc Kleine-Budde <mkl@pengutronix.de> ha scritto:
> 
>  
> On 25.07.2021 18:11:50, Dario Binacchi wrote:
> > As reported by a comment in the c_can_start_xmit() this was not a FIFO.
> > C/D_CAN controller sends out the buffers prioritized so that the lowest
> > buffer number wins.
> > 
> > What did c_can_start_xmit() do if head was less tail in the tx ring ? It
> > waited until all the frames queued in the FIFO was actually transmitted
> > by the controller before accepting a new CAN frame to transmit, even if
> > the FIFO was not full, to ensure that the messages were transmitted in
> > the order in which they were loaded.
> > 
> > By storing the frames in the FIFO without requiring its transmission, we
> > will be able to use the full size of the FIFO even in cases such as the
> > one described above. The transmission interrupt will trigger their
> > transmission only when all the messages previously loaded but stored in
> > less priority positions of the buffers have been transmitted.
> > 
> > Suggested-by: Gianluca Falavigna <gianluca.falavigna@inwind.it>
> > Signed-off-by: Dario Binacchi <dariobin@libero.it>
> > 
> > ---
> > 
> >  drivers/net/can/c_can/c_can.h      |  6 +++++
> >  drivers/net/can/c_can/c_can_main.c | 42 +++++++++++++++++-------------
> >  2 files changed, 30 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
> > index 8fe7e2138620..fc499a70b797 100644
> > --- a/drivers/net/can/c_can/c_can.h
> > +++ b/drivers/net/can/c_can/c_can.h
> > +static inline u8 c_can_get_tx_free(const struct c_can_tx_ring *ring)
> > +{
> > +	return ring->obj_num - (ring->head - ring->tail);
> > +}
> > +
> >  #endif /* C_CAN_H */
> > diff --git a/drivers/net/can/c_can/c_can_main.c b/drivers/net/can/c_can/c_can_main.c
> > index 451ac9a9586a..4c061fef002c 100644
> > --- a/drivers/net/can/c_can/c_can_main.c
> > +++ b/drivers/net/can/c_can/c_can_main.c
> > @@ -427,20 +427,6 @@ static void c_can_setup_receive_object(struct net_device *dev, int iface,
> >  	c_can_object_put(dev, iface, obj, IF_COMM_RCV_SETUP);
> >  }
> >  
> > -static u8 c_can_get_tx_free(const struct c_can_tx_ring *ring)
> > -{
> > -	u8 head = c_can_get_tx_head(ring);
> > -	u8 tail = c_can_get_tx_tail(ring);
> > -
> > -	/* This is not a FIFO. C/D_CAN sends out the buffers
> > -	 * prioritized. The lowest buffer number wins.
> > -	 */
> > -	if (head < tail)
> > -		return 0;
> > -
> > -	return ring->obj_num - head;
> > -}
> > -
> 
> Can you move that change into patch 3?

Patch 3 adds the ring transmission algorithm without compromising the
message transmission order. This is not a FIFO. C/D_CAN controller sends
out the buffers prioritized. The lowest buffer number wins, so moving the
change into patch 3 may not guarantee the transmission order.
In patch 3, however, I will move c_can_get_tx_free() from c_can_main.c to 
c_can.h, so that in patch 4 it will be clearer how the routine has changed.

Thanks and regards,
Dario

> 
> Marc
> 
> -- 
> Pengutronix e.K.                 | Marc Kleine-Budde           |
> Embedded Linux                   | https://www.pengutronix.de  |
> Vertretung West/Dortmund         | Phone: +49-231-2826-924     |
> Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-5555 |

  reply	other threads:[~2021-08-05 20:12 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-25 16:11 [RESEND PATCH 0/4] can: c_can: cache frames to operate as a true FIFO Dario Binacchi
2021-07-25 16:11 ` [RESEND PATCH 1/4] can: c_can: remove struct c_can_priv::priv field Dario Binacchi
2021-07-25 16:11 ` [RESEND PATCH 2/4] can: c_can: exit c_can_do_tx() early if no frames have been sent Dario Binacchi
2021-07-25 16:11 ` [RESEND PATCH 3/4] can: c_can: support tx ring algorithm Dario Binacchi
2021-08-04  9:37   ` Marc Kleine-Budde
2021-07-25 16:11 ` [RESEND PATCH 4/4] can: c_can: cache frames to operate as a true FIFO Dario Binacchi
2021-08-04  9:34   ` Marc Kleine-Budde
2021-08-05 20:12     ` Dario Binacchi [this message]
2021-08-06  7:52       ` Marc Kleine-Budde
2021-08-04  9:45   ` Marc Kleine-Budde
2021-08-05 20:16     ` Dario Binacchi
2021-08-06  9:25       ` Marc Kleine-Budde
2021-08-07 12:36         ` Dario Binacchi

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