From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Rex-BC Chen <rex-bc.chen@mediatek.com>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
"Vinod Koul" <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chen-Yu Tsai <wenst@chromium.org>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
Krzysztof Kozlowski <krzk@kernel.org>
Cc: Wei-Shun Chang <weishunc@google.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-phy@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <randy.wu@mediatek.com>,
<jieyy.yang@mediatek.com>, <chuanjia.liu@mediatek.com>,
<qizhong.cheng@mediatek.com>, <jian.yang@mediatek.com>
Subject: Re: [PATCH v8 2/2] phy: mediatek: Add PCIe PHY driver
Date: Wed, 18 May 2022 10:21:20 +0800 [thread overview]
Message-ID: <124a48372c1ce0c28433f5c93ba1b4ac222ae9b8.camel@mediatek.com> (raw)
In-Reply-To: <8affe58a4952d6c405dd41f18c6a7f40b2313fde.camel@mediatek.com>
On Wed, 2022-05-11 at 11:22 +0800, Rex-BC Chen wrote:
> On Sat, 2022-05-07 at 14:06 +0800, Jianjun Wang wrote:
> > Add PCIe GEN3 PHY driver support on MediaTek chipsets.
> >
> > +
> > +static int mtk_pcie_phy_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct phy_provider *provider;
> > + struct mtk_pcie_phy *pcie_phy;
> > + int ret;
> > +
> > + pcie_phy = devm_kzalloc(dev, sizeof(*pcie_phy), GFP_KERNEL);
> > + if (!pcie_phy)
> > + return -ENOMEM;
> > +
> > + pcie_phy->sif_base =
> > devm_platform_ioremap_resource_byname(pdev, "sif");
> > + if (IS_ERR(pcie_phy->sif_base))
> > + return dev_err_probe(dev, PTR_ERR(pcie_phy->sif_base),
> > + "Failed to map phy-sif base\n");
> > +
> > + pcie_phy->phy = devm_phy_create(dev, dev->of_node,
> > &mtk_pcie_phy_ops);
> > + if (IS_ERR(pcie_phy->phy))
> > + return dev_err_probe(dev, PTR_ERR(pcie_phy->phy),
> > + "Failed to create PCIe phy\n");
> > +
> > + pcie_phy->dev = dev;
> > + pcie_phy->data = of_device_get_match_data(dev);
> > + if (!pcie_phy->data)
> > + return dev_err_probe(dev, -EINVAL, "Failed to get phy
> > data\n");
> > +
> > + if (pcie_phy->data->sw_efuse_supported) {
> > + /*
> > + * Failed to read the efuse data is not a fatal
> > problem,
> > + * ignore the failure and keep going.
> > + */
> > + ret = mtk_pcie_read_efuse(pcie_phy);
> > + if (ret == -EPROBE_DEFER)
> > + return ret;
>
> Hello Jianjun,
>
> even though it's not a fatal problem if we can not read efuse, but I
> tink "ret = -ENOMEM" does not mean we can't read it?
>
> Do we need to handle this?
Yes, I think we should handle it in this case, I'll fix it in the next
version, thanks for your review.
Thanks.
>
> BRs,
> Rex
> > + }
> > +
> > + phy_set_drvdata(pcie_phy->phy, pcie_phy);
> > +
> > + provider = devm_of_phy_provider_register(dev,
> > of_phy_simple_xlate);
> > + if (IS_ERR(provider))
> > + return dev_err_probe(dev, PTR_ERR(provider),
> > + "PCIe phy probe failed\n");
> > +
> > + return 0;
> > +}
> > +
> > +static const struct mtk_pcie_phy_data mt8195_data = {
> > + .num_lanes = 2,
> > + .sw_efuse_supported = true,
> > +};
> > +
> > +static const struct of_device_id mtk_pcie_phy_of_match[] = {
> > + { .compatible = "mediatek,mt8195-pcie-phy", .data =
> > &mt8195_data },
> > + { },
> > +};
> > +MODULE_DEVICE_TABLE(of, mtk_pcie_phy_of_match);
> > +
> > +static struct platform_driver mtk_pcie_phy_driver = {
> > + .probe = mtk_pcie_phy_probe,
> > + .driver = {
> > + .name = "mtk-pcie-phy",
> > + .of_match_table = mtk_pcie_phy_of_match,
> > + },
> > +};
> > +module_platform_driver(mtk_pcie_phy_driver);
> > +
> > +MODULE_DESCRIPTION("MediaTek PCIe PHY driver");
> > +MODULE_AUTHOR("Jianjun Wang <jianjun.wang@mediatek.com>");
> > +MODULE_LICENSE("GPL");
>
>
prev parent reply other threads:[~2022-05-18 2:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-07 6:06 [PATCH v8 0/2] phy: mediatek: Add PCIe PHY driver Jianjun Wang
2022-05-07 6:06 ` [PATCH v8 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY Jianjun Wang
2022-05-07 6:06 ` [PATCH v8 2/2] phy: mediatek: Add PCIe PHY driver Jianjun Wang
2022-05-09 8:08 ` AngeloGioacchino Del Regno
2022-05-11 3:22 ` Rex-BC Chen
2022-05-18 2:21 ` Jianjun Wang [this message]
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