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From: Catalin Marinas <catalin.marinas@arm.com>
To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Will Deacon <will.deacon@arm.com>
Subject: [PATCH v3 03/20] ARM: LPAE: use long long format when printing physical addresses and ptes
Date: Mon, 15 Nov 2010 17:40:12 +0000	[thread overview]
Message-ID: <1289842829-3027-4-git-send-email-catalin.marinas@arm.com> (raw)
In-Reply-To: <1289842829-3027-1-git-send-email-catalin.marinas@arm.com>

From: Will Deacon <will.deacon@arm.com>

Now that the Kernel supports 2 level and 3 level page tables, physical
addresses (and also page table entries) may be 32 or 64-bits depending
upon the configuration.

This patch uses the %08llx conversion specifier for physical addresses
and page table entries, ensuring that they are cast to (long long) so
that common code can be used regardless of the datatype widths.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm/include/asm/pgtable.h |    6 +++---
 arch/arm/kernel/setup.c        |    2 +-
 arch/arm/kernel/traps.c        |   12 ++++++------
 arch/arm/mm/fault.c            |   10 ++++++----
 arch/arm/mm/mmu.c              |   30 +++++++++++++++---------------
 5 files changed, 31 insertions(+), 29 deletions(-)

diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 17e7ba6..e716147 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -45,9 +45,9 @@
 #define LIBRARY_TEXT_START	0x0c000000
 
 #ifndef __ASSEMBLY__
-extern void __pte_error(const char *file, int line, unsigned long val);
-extern void __pmd_error(const char *file, int line, unsigned long val);
-extern void __pgd_error(const char *file, int line, unsigned long val);
+extern void __pte_error(const char *file, int line, pteval_t val);
+extern void __pmd_error(const char *file, int line, pteval_t val);
+extern void __pgd_error(const char *file, int line, pteval_t val);
 
 #define pte_ERROR(pte)		__pte_error(__FILE__, __LINE__, pte_val(pte))
 #define pmd_ERROR(pmd)		__pmd_error(__FILE__, __LINE__, pmd_val(pmd))
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 3cadb46..81ab007 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -448,7 +448,7 @@ static int __init arm_add_memory(unsigned long start, unsigned long size)
 
 	if (meminfo.nr_banks >= NR_BANKS) {
 		printk(KERN_CRIT "NR_BANKS too low, "
-			"ignoring memory at %#lx\n", start);
+			"ignoring memory at %#08llx\n", (long long)start);
 		return -EINVAL;
 	}
 
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 87abca0..cdf3d86 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -713,19 +713,19 @@ void __readwrite_bug(const char *fn)
 }
 EXPORT_SYMBOL(__readwrite_bug);
 
-void __pte_error(const char *file, int line, unsigned long val)
+void __pte_error(const char *file, int line, pteval_t val)
 {
-	printk("%s:%d: bad pte %08lx.\n", file, line, val);
+	printk("%s:%d: bad pte %08llx.\n", file, line, (long long)val);
 }
 
-void __pmd_error(const char *file, int line, unsigned long val)
+void __pmd_error(const char *file, int line, pteval_t val)
 {
-	printk("%s:%d: bad pmd %08lx.\n", file, line, val);
+	printk("%s:%d: bad pmd %08llx.\n", file, line, (long long)val);
 }
 
-void __pgd_error(const char *file, int line, unsigned long val)
+void __pgd_error(const char *file, int line, pteval_t val)
 {
-	printk("%s:%d: bad pgd %08lx.\n", file, line, val);
+	printk("%s:%d: bad pgd %08llx.\n", file, line, (long long)val);
 }
 
 asmlinkage void __div0(void)
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 1e21e12..a6eb56b 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -76,7 +76,8 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 
 	printk(KERN_ALERT "pgd = %p\n", mm->pgd);
 	pgd = pgd_offset(mm, addr);
-	printk(KERN_ALERT "[%08lx] *pgd=%08lx", addr, pgd_val(*pgd));
+	printk(KERN_ALERT "[%08lx] *pgd=%08llx",
+			addr, (long long)pgd_val(*pgd));
 
 	do {
 		pmd_t *pmd;
@@ -92,7 +93,7 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 
 		pmd = pmd_offset(pgd, addr);
 		if (PTRS_PER_PMD != 1)
-			printk(", *pmd=%08lx", pmd_val(*pmd));
+			printk(", *pmd=%08llx", (long long)pmd_val(*pmd));
 
 		if (pmd_none(*pmd))
 			break;
@@ -107,8 +108,9 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 			break;
 
 		pte = pte_offset_map(pmd, addr);
-		printk(", *pte=%08lx", pte_val(*pte));
-		printk(", *ppte=%08lx", pte_val(pte[-PTRS_PER_PTE]));
+		printk(", *pte=%08llx", (long long)pte_val(*pte));
+		printk(", *ppte=%08llx",
+			(long long)pte_val(pte[-PTRS_PER_PTE]));
 		pte_unmap(pte);
 	} while(0);
 
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 5e3adca..c2e74b5 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -598,8 +598,8 @@ static void __init create_36bit_mapping(struct map_desc *md,
 
 	if (!(cpu_architecture() >= CPU_ARCH_ARMv6 || cpu_is_xsc3())) {
 		printk(KERN_ERR "MM: CPU does not support supersection "
-		       "mapping for 0x%08llx at 0x%08lx\n",
-		       __pfn_to_phys((u64)md->pfn), addr);
+		       "mapping for %#08llx at %#08lx\n",
+		       (long long)__pfn_to_phys((u64)md->pfn), addr);
 		return;
 	}
 
@@ -611,15 +611,15 @@ static void __init create_36bit_mapping(struct map_desc *md,
 	 */
 	if (type->domain) {
 		printk(KERN_ERR "MM: invalid domain in supersection "
-		       "mapping for 0x%08llx at 0x%08lx\n",
-		       __pfn_to_phys((u64)md->pfn), addr);
+		       "mapping for %#08llx at %#08lx\n",
+		       (long long)__pfn_to_phys((u64)md->pfn), addr);
 		return;
 	}
 
 	if ((addr | length | __pfn_to_phys(md->pfn)) & ~SUPERSECTION_MASK) {
-		printk(KERN_ERR "MM: cannot create mapping for "
-		       "0x%08llx at 0x%08lx invalid alignment\n",
-		       __pfn_to_phys((u64)md->pfn), addr);
+		printk(KERN_ERR "MM: cannot create mapping for %#08llx"
+		       " at %#08lx invalid alignment\n",
+		       (long long)__pfn_to_phys((u64)md->pfn), addr);
 		return;
 	}
 
@@ -658,17 +658,17 @@ static void __init create_mapping(struct map_desc *md)
 	pgd_t *pgd;
 
 	if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) {
-		printk(KERN_WARNING "BUG: not creating mapping for "
-		       "0x%08llx at 0x%08lx in user region\n",
-		       __pfn_to_phys((u64)md->pfn), md->virtual);
+		printk(KERN_WARNING "BUG: not creating mapping for %#08llx"
+		       " at %#08lx in user region\n",
+		       (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
 		return;
 	}
 
 	if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
 	    md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) {
-		printk(KERN_WARNING "BUG: mapping for 0x%08llx at 0x%08lx "
-		       "overlaps vmalloc space\n",
-		       __pfn_to_phys((u64)md->pfn), md->virtual);
+		printk(KERN_WARNING "BUG: mapping for %#08llx"
+		       " at %#08lx overlaps vmalloc space\n",
+		       (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
 	}
 
 	type = &mem_types[md->type];
@@ -686,9 +686,9 @@ static void __init create_mapping(struct map_desc *md)
 	length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
 
 	if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) {
-		printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not "
+		printk(KERN_WARNING "BUG: map for %#08llx at %#08lx can not "
 		       "be mapped using pages, ignoring.\n",
-		       __pfn_to_phys(md->pfn), addr);
+		       (long long)__pfn_to_phys(md->pfn), addr);
 		return;
 	}
 

  parent reply	other threads:[~2010-11-15 17:40 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-11-15 17:40 [PATCH v3 00/20] ARM: Add support for the Large Physical Address Extensions Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 01/20] ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_* Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 02/20] ARM: LPAE: Factor out 2-level page table definitions into separate files Catalin Marinas
2010-11-15 17:40 ` Catalin Marinas [this message]
2010-11-15 17:40 ` [PATCH v3 04/20] ARM: LPAE: use u32 instead of unsigned long for 32-bit ptes Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 05/20] ARM: LPAE: Do not assume Linux PTEs are always at PTRS_PER_PTE offset Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 06/20] ARM: LPAE: Introduce L_PTE_NOEXEC and L_PTE_NOWRITE Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 07/20] ARM: LPAE: Introduce the 3-level page table format definitions Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 08/20] ARM: LPAE: Page table maintenance for the 3-level format Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 09/20] ARM: LPAE: MMU setup for the 3-level page table format Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 10/20] ARM: LPAE: Change setup_mm_for_reboot() to work with LPAE Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 11/20] ARM: LPAE: Remove the FIRST_USER_PGD_NR and USER_PTRS_PER_PGD definitions Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 12/20] ARM: LPAE: Add fault handling support Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 13/20] ARM: LPAE: Add context switching support Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 14/20] ARM: LPAE: Add SMP support for the 3-level page table format Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 15/20] ARM: LPAE: use phys_addr_t instead of unsigned long for physical addresses Catalin Marinas
2010-11-16 19:14   ` Stephen Boyd
2010-11-16 19:33     ` Russell King - ARM Linux
2010-11-17 10:47       ` Catalin Marinas
2010-11-17 11:18         ` Arnd Bergmann
2010-11-17 15:28           ` Catalin Marinas
2010-11-17 15:40             ` Arnd Bergmann
2010-11-15 17:40 ` [PATCH v3 16/20] ARM: LPAE: Use generic dma_addr_t type definition Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 17/20] ARM: LPAE: mark memory banks with start > ULONG_MAX as highmem Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 18/20] ARM: LPAE: use phys_addr_t for physical start address in early_mem Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 19/20] ARM: LPAE: add support for ATAG_MEM64 Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 20/20] ARM: LPAE: Add the Kconfig entries Catalin Marinas

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