From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07638C4320A for ; Wed, 28 Jul 2021 14:06:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DC0BB60C3F for ; Wed, 28 Jul 2021 14:06:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236392AbhG1OGh (ORCPT ); Wed, 28 Jul 2021 10:06:37 -0400 Received: from gloria.sntech.de ([185.11.138.130]:50104 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233439AbhG1OGg (ORCPT ); Wed, 28 Jul 2021 10:06:36 -0400 Received: from [95.90.166.74] (helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1m8kCc-0005wH-22; Wed, 28 Jul 2021 16:06:30 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Peter Geis Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Peter Geis Subject: Re: [PATCH 6/9] arm64: dts: rockchip: add missing rk3568 cru phandles Date: Wed, 28 Jul 2021 16:06:29 +0200 Message-ID: <13247009.uLZWGnKmhe@diego> In-Reply-To: <20210728135534.703028-7-pgwipeout@gmail.com> References: <20210728135534.703028-1-pgwipeout@gmail.com> <20210728135534.703028-7-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Peter, Am Mittwoch, 28. Juli 2021, 15:55:31 CEST schrieb Peter Geis: > The grf and pmugrf phandles are necessary for the pmucru and cru to > modify clocks. Add these phandles to permit adjusting the clock rates > and muxes. > > Signed-off-by: Peter Geis > --- > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > index 0905fac0726a..8ba0516eedd8 100644 > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > @@ -218,6 +218,8 @@ grf: syscon@fdc60000 { > pmucru: clock-controller@fdd00000 { > compatible = "rockchip,rk3568-pmucru"; > reg = <0x0 0xfdd00000 0x0 0x1000>; > + rockchip,grf = <&grf>; > + rockchip,pmugrf = <&pmugrf>; I don't think the pmucru needs both and in fact the mainline clock driver should just reference its specific grf at all, i.e. pmucru -> pmugrf (via the rockchip,grf handle) cru -> grf I've not seen anything breaking this scope so far. Heiko > #clock-cells = <1>; > #reset-cells = <1>; > }; > @@ -225,6 +227,7 @@ pmucru: clock-controller@fdd00000 { > cru: clock-controller@fdd20000 { > compatible = "rockchip,rk3568-cru"; > reg = <0x0 0xfdd20000 0x0 0x1000>; > + rockchip,grf = <&grf>; > #clock-cells = <1>; > #reset-cells = <1>; > }; >