From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752810Ab2BPQUB (ORCPT ); Thu, 16 Feb 2012 11:20:01 -0500 Received: from merlin.infradead.org ([205.233.59.134]:46521 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752425Ab2BPQUA convert rfc822-to-8bit (ORCPT ); Thu, 16 Feb 2012 11:20:00 -0500 Message-ID: <1329409183.2293.245.camel@twins> Subject: Re: oprofile and ARM A9 hardware counter From: Peter Zijlstra To: Ming Lei Cc: Will Deacon , "eranian@gmail.com" , "Shilimkar, Santosh" , David Long , "b-cousson@ti.com" , "mans@mansr.com" , linux-arm , Ingo Molnar , Linux Kernel Mailing List Date: Thu, 16 Feb 2012 17:19:43 +0100 In-Reply-To: References: <1329323900.2293.150.camel@twins> <20120216150004.GE2641@mudshark.cambridge.arm.com> Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7BIT X-Mailer: Evolution 3.2.2- Mime-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2012-02-17 at 00:12 +0800, Ming Lei wrote: > is triggered: u64 delta = 100 - 1000000 = 18446744073708551716. on x86 we do: int shift = 64 - x86_pmu.cntval_bits; s64 delta; delta = (new_raw_count << shift) - (prev_raw_count << shift); delta >>= shift; This deals with short overflows (on x86 the registers are typically 40 or 48 bits wide). If the arm register is 32 you can of course also get there with some u32 casts.