Re: [patch] x86, tlb: switch cr3 in leave_mm() only when needed

[Suresh Siddha <suresh.b.siddha@intel.com>]

On Thu, 2012-03-22 at 16:44 -0700, Linus Torvalds wrote:
> Hmm. If this is reasonably common (and intel_idle() certainly is),
> maybe we shouldn't even do the "test_and_clear" RMW cycle.
> 
> We could do it with a read-only bit test (no races I can see - if it's
> clear, it will stay clear), so we could do this with
> 
>     if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) {
>         cpumask_clear_cpu(cpu,mm_cpumask(active_mm));
>         load_cr3(swapper_pg_dir);
>     }
> 
> instead? And avoid touching that "mm_cpumask" (and the atomic
> serializing instruction) when not necessary?

Agreed. Updated patch appended. Thanks.
---
From: Suresh Siddha <suresh.b.siddha@intel.com>
Subject: x86, tlb: switch cr3 in leave_mm() only when needed

Currently leave_mm() unconditionally switches the cr3 to swapper_pg_dir.
But there is no need to change the cr3, if we already left that mm.

intel_idle() for example calls leave_mm() on every deep c-state entry where
the CPU flushes the TLB for us. Similarly flush_tlb_all() was also calling
leave_mm() whenever the TLB is in LAZY state. Both these paths will be
improved with this change.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
---
 arch/x86/mm/tlb.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index d6c0418..125bcad 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -61,11 +61,13 @@ static DEFINE_PER_CPU_READ_MOSTLY(int, tlb_vector_offset);
  */
 void leave_mm(int cpu)
 {
+	struct mm_struct *active_mm = percpu_read(cpu_tlbstate.active_mm);
 	if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
 		BUG();
-	cpumask_clear_cpu(cpu,
-			  mm_cpumask(percpu_read(cpu_tlbstate.active_mm)));
-	load_cr3(swapper_pg_dir);
+	if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) {
+		cpumask_clear_cpu(cpu, mm_cpumask(active_mm));
+		load_cr3(swapper_pg_dir);
+	}
 }
 EXPORT_SYMBOL_GPL(leave_mm);