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From: Yinghai Lu <yinghai@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Tony Luck <tony.luck@intel.com>,
	David Miller <davem@davemloft.net>, x86 <x86@kernel.org>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>,
	Andrew Morton <akpm@linux-foundation.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arch@vger.kernel.org, Yinghai Lu <yinghai@kernel.org>
Subject: [PATCH -v12 10/15] PCI: Seperate child bus scanning to two passes overall
Date: Tue, 26 Jun 2012 11:54:04 -0700	[thread overview]
Message-ID: <1340736849-14875-11-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1340736849-14875-1-git-send-email-yinghai@kernel.org>

In extreme case: Two bridges are properly setup.
       bridge A
               bridge AA
               bridge AB
       bridge B
	       bridge BA
	       bridge BB
   but AA, AB are not setup properly.
   bridge A has small range, and bridge AB could need more, when do the
       first pass0 for bridge A, it will do pass0 and pass1 for AA and AB,
	during that process, it will extend range of A for AB blindly.
	because bridge B is not registered yet.
       that could overlap range that is used by bridge B.

Right way should be:
       do pass0 for all good bridges at first.
So we could do pass0 for bridge B before pass1 for bridge AB.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   50 ++++++++++++++++++++++++++++++++++----------------
 1 files changed, 34 insertions(+), 16 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index d558316..e77f58d 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -765,6 +765,9 @@ static int __devinit pci_bridge_check_busn_broken(struct pci_bus *bus,
 
 	return 0;
 }
+
+static unsigned int __devinit __pci_scan_child_bus(struct pci_bus *bus,
+						 int pass);
 /*
  * If it's a bridge, configure it and scan the bus behind it.
  * For CardBus bridges, we don't scan behind as the devices will
@@ -821,11 +824,10 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 	    !is_cardbus && !broken) {
 		unsigned int cmax;
 		/*
-		 * Bus already configured by firmware, process it in the first
-		 * pass and just note the configuration.
+		 * Bus already configured by firmware, still process it in two
+		 * passes in extreme case like two adjaced bridges have children
+		 * bridges that are not setup properly.
 		 */
-		if (pass)
-			goto out;
 
 		/*
 		 * If we already got to this bus through a different bridge,
@@ -844,7 +846,7 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 			child->bridge_ctl = bctl;
 		}
 
-		cmax = pci_scan_child_bus(child);
+		cmax = __pci_scan_child_bus(child, pass);
 		if (cmax > max)
 			max = cmax;
 		if (child->busn_res.end > max)
@@ -1662,12 +1664,13 @@ void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss)
 }
 EXPORT_SYMBOL_GPL(pcie_bus_configure_settings);
 
-unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
+static unsigned int __devinit __pci_scan_child_bus(struct pci_bus *bus,
+						 int pass)
 {
-	unsigned int devfn, pass, max = bus->busn_res.start;
+	unsigned int devfn, max = bus->busn_res.start;
 	struct pci_dev *dev;
 
-	dev_dbg(&bus->dev, "scanning bus\n");
+	dev_dbg(&bus->dev, "scanning bus pass %d\n", pass);
 
 	/* Go find them, Rover! */
 	for (devfn = 0; devfn < 0x100; devfn += 8)
@@ -1681,18 +1684,16 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
 	 * all PCI-to-PCI bridges on this bus.
 	 */
 	if (!bus->is_added) {
-		dev_dbg(&bus->dev, "fixups for bus\n");
+		dev_dbg(&bus->dev, "fixups for bus pass %d\n", pass);
 		pcibios_fixup_bus(bus);
 		if (pci_is_root_bus(bus))
 			bus->is_added = 1;
 	}
 
-	for (pass=0; pass < 2; pass++)
-		list_for_each_entry(dev, &bus->devices, bus_list) {
-			if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
-			    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
-				max = pci_scan_bridge(bus, dev, max, pass);
-		}
+	list_for_each_entry(dev, &bus->devices, bus_list)
+		if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+		    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
+			max = pci_scan_bridge(bus, dev, max, pass);
 
 	/*
 	 * We've scanned the bus and so we know all about what's on
@@ -1701,7 +1702,24 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
 	 *
 	 * Return how far we've got finding sub-buses.
 	 */
-	dev_dbg(&bus->dev, "bus scan returning with max=%02x\n", max);
+	dev_dbg(&bus->dev, "bus scan returning with max=%02x pass %d\n",
+			max, pass);
+
+	return max;
+}
+
+unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
+{
+	int pass;
+	unsigned int max = 0, tmp;
+
+	for (pass = 0; pass < 2;  pass++) {
+		tmp = __pci_scan_child_bus(bus, pass);
+
+		if (tmp > max)
+			max = tmp;
+	}
+
 	return max;
 }
 
-- 
1.7.7


  parent reply	other threads:[~2012-06-26 18:55 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-26 18:53 [PATCH -v12 00/15] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-06-26 18:53 ` [PATCH -v12 01/15] resources: Split out __allocate_resource() Yinghai Lu
2012-06-26 19:01   ` Linus Torvalds
2012-06-26 20:33     ` Yinghai Lu
2012-06-26 20:43       ` Linus Torvalds
2012-06-26 18:53 ` [PATCH -v12 02/15] resources: Add probe_resource() Yinghai Lu
2012-06-26 22:07   ` Yinghai Lu
2012-08-28 16:09     ` Yinghai Lu
2012-08-28 17:05       ` Linus Torvalds
2012-08-29  0:10         ` Linus Torvalds
2012-08-29 10:14           ` Ram Pai
2012-08-29 16:02             ` Yinghai Lu
2012-08-29 15:57           ` Yinghai Lu
2012-08-29 17:36             ` Yinghai Lu
2012-08-31  0:40               ` Bjorn Helgaas
2012-06-26 18:53 ` [PATCH -v12 03/15] resources: Replace registered resource in tree Yinghai Lu
2012-06-26 18:53 ` [PATCH -v12 04/15] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-06-26 18:53 ` [PATCH -v12 05/15] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-06-26 18:54 ` [PATCH -v12 06/15] PCI: Add pci_bus_replace_busn_res() Yinghai Lu
2012-06-26 18:54 ` [PATCH -v12 07/15] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-06-26 18:54 ` [PATCH -v12 08/15] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-06-26 18:54 ` [PATCH -v12 09/15] PCI: Kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-06-26 18:54 ` Yinghai Lu [this message]
2012-06-26 18:54 ` [PATCH -v12 11/15] pcmcia: Remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-06-26 18:54 ` [PATCH -v12 12/15] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-06-26 18:54 ` [PATCH -v12 13/15] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu
2012-06-26 18:54 ` [PATCH -v12 14/15] PCI: More strict checking of valid range for bridge Yinghai Lu
2012-06-26 18:54 ` [PATCH -v12 15/15] PCI: Don't shrink too much for hotplug bridge Yinghai Lu

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