From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755037Ab2IFMtY (ORCPT ); Thu, 6 Sep 2012 08:49:24 -0400 Received: from metis.ext.pengutronix.de ([92.198.50.35]:40947 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754749Ab2IFMsv (ORCPT ); Thu, 6 Sep 2012 08:48:51 -0400 From: Sascha Hauer To: Cc: HACHIMI Samir , shawn.guo@linaro.org, thierry.reding@avionic-design.de, linux-kernel@vger.kernel.org, =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= , kernel@pengutronix.de, Sascha Hauer Subject: [PATCH 8/9] ARM i.MX53: Add pwm support Date: Thu, 6 Sep 2012 14:48:14 +0200 Message-Id: <1346935695-25179-9-git-send-email-s.hauer@pengutronix.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1346935695-25179-1-git-send-email-s.hauer@pengutronix.de> References: <1346935695-25179-1-git-send-email-s.hauer@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:6f8:1178:2:21e:67ff:fe11:9c5c X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Sascha Hauer Reviewed-by: Shawn Guo Reviewed-by: Benoît Thébaudeau --- arch/arm/boot/dts/imx53.dtsi | 14 ++++++++++++++ arch/arm/mach-imx/clk-imx51-imx53.c | 4 ++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index cd37165..18b9fc3 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -189,6 +189,20 @@ status = "disabled"; }; + pwm1: pwm@53fb4000 { + #pwm-cells = <2>; + compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; + reg = <0x53fb4000 0x4000>; + interrupts = <61>; + }; + + pwm2: pwm@53fb8000 { + #pwm-cells = <2>; + compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; + reg = <0x53fb8000 0x4000>; + interrupts = <94>; + }; + uart1: serial@53fbc000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53fbc000 0x4000>; diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index 4bdcaa9..b522411 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -455,6 +455,10 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi"); + clk_register_clkdev(clk[pwm1_ipg_gate], "ipg", "53fb4000.pwm"); + clk_register_clkdev(clk[pwm1_hf_gate], "per", "53fb4000.pwm"); + clk_register_clkdev(clk[pwm2_ipg_gate], "ipg", "53fb8000.pwm"); + clk_register_clkdev(clk[pwm2_hf_gate], "per", "53fb8000.pwm"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000); -- 1.7.10.4