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From: Andre Przywara <andre.przywara@amd.com>
To: <hpa@zytor.com>, <tglx@linutronix.de>, <mingo@elte.hu>
Cc: <linux-kernel@vger.kernel.org>, <andreas.herrmann3@amd.com>,
	Andre Przywara <andre.przywara@amd.com>
Subject: [PATCH] x86/amd: disable way access filter on affected CPUs
Date: Wed, 24 Oct 2012 09:56:17 +0200	[thread overview]
Message-ID: <1351065377-1989-1-git-send-email-andre.przywara@amd.com> (raw)

The WAF may hurt the performance of some workloads, caused by
aliasing issues in the L1 cache.
Disable it on the affected CPUs.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
---
 arch/x86/kernel/cpu/amd.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index f7e98a2..1b7d165 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -631,6 +631,20 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 		}
 	}
 
+	/*
+	 * The way access filter has a performance penalty on some workloads.
+	 * Disable it on the affected CPUs.
+	 */
+	if ((c->x86 == 0x15) &&
+	    (c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
+		u64 val;
+
+		if (!rdmsrl_safe(0xc0011021, &val) && !(val & 0x1E)) {
+			val |= 0x1E;
+			wrmsrl_safe(0xc0011021, val);
+		}
+	}
+
 	cpu_detect_cache_sizes(c);
 
 	/* Multi core CPU? */
-- 
1.7.12.1



             reply	other threads:[~2012-10-24  7:52 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-24  7:56 Andre Przywara [this message]
2012-10-24 10:46 ` [PATCH] x86/amd: disable way access filter on affected CPUs Ingo Molnar
2012-10-24 15:35   ` Andre Przywara
2012-10-26 14:56     ` Ingo Molnar
2012-10-31 16:20       ` Andre Przywara
2012-11-01 21:33         ` [tip:x86/urgent] x86, amd: Disable way access filter on Piledriver CPUs tip-bot for Andre Przywara

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