From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752595Ab2KJBeo (ORCPT ); Fri, 9 Nov 2012 20:34:44 -0500 Received: from mga01.intel.com ([192.55.52.88]:39679 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751262Ab2KJB15 (ORCPT ); Fri, 9 Nov 2012 20:27:57 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.80,749,1344236400"; d="scan'208";a="244848909" From: Andi Kleen To: linux-kernel@vger.kernel.org Cc: acme@redhat.com, peterz@infradead.org, jolsa@redhat.com, eranian@google.com, mingo@kernel.org, namhyung@kernel.org, Andi Kleen Subject: [PATCH 06/32] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Date: Fri, 9 Nov 2012 17:27:22 -0800 Message-Id: <1352510868-7911-7-git-send-email-andi@firstfloor.org> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1352510868-7911-1-git-send-email-andi@firstfloor.org> References: <1352510868-7911-1-git-send-email-andi@firstfloor.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andi Kleen Haswell supplies the address for every PEBS memory event, so always fill it in when the user requested it. It will be 0 when not useful (no memory access) Signed-off-by: Andi Kleen --- arch/x86/kernel/cpu/perf_event_intel_ds.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index 16d7c58..aa0f5fa 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c @@ -630,6 +630,10 @@ static void __intel_pmu_pebs_event(struct perf_event *event, else regs.flags &= ~PERF_EFLAGS_EXACT; + if ((event->attr.sample_type & PERF_SAMPLE_ADDR) && + x86_pmu.intel_cap.pebs_format >= 2) + data.addr = ((struct pebs_record_v2 *)pebs)->nhm.dla; + if (has_branch_stack(event)) data.br_stack = &cpuc->lbr_stack; -- 1.7.7.6