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From: Varun Sethi <Varun.Sethi@freescale.com>
To: <joerg.roedel@amd.com>, <iommu@lists.linux-foundation.org>,
	<linuxppc-dev@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
	<scottwood@freescale.com>, <timur@freescale.com>
Cc: Varun Sethi <Varun.Sethi@freescale.com>
Subject: [PATCH 2/4] iommu/fsl: Add PAMU bypass enable register to ccsr_guts structure.
Date: Tue, 20 Nov 2012 19:24:55 +0530	[thread overview]
Message-ID: <1353419697-31269-3-git-send-email-Varun.Sethi@freescale.com> (raw)
In-Reply-To: <1353419697-31269-1-git-send-email-Varun.Sethi@freescale.com>

PAMU bypass enable register added to the ccsr_guts structure.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
---
 arch/powerpc/include/asm/fsl_guts.h |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index aa4c488..bb208eb 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -69,7 +69,9 @@ struct ccsr_guts {
 	u8	res0c4[0x224 - 0xc4];
 	__be32  iodelay1;	/* 0x.0224 - IO delay control register 1 */
 	__be32  iodelay2;	/* 0x.0228 - IO delay control register 2 */
-	u8	res22c[0x800 - 0x22c];
+	u8	res22c[0x604 - 0x22c];
+	__be32	pamubypenr; 	/* 0x.604 - PAMU bypass enable register */
+	u8	res608[0x800 - 0x608];
 	__be32	clkdvdr;	/* 0x.0800 - Clock Divide Register */
 	u8	res804[0x900 - 0x804];
 	__be32	ircr;		/* 0x.0900 - Infrared Control Register */
-- 
1.7.4.1



  parent reply	other threads:[~2012-11-20 14:00 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-11-20 13:54 [PATCH 0/4] iommu/fsl: Freescale PAMU driver and IOMMU API implementation Varun Sethi
2012-11-20 13:54 ` [PATCH 1/4 v2] iommu/fsl: Store iommu domain information pointer in archdata Varun Sethi
2012-11-26  5:33   ` Sethi Varun-B16395
2012-11-28 17:35     ` Kumar Gala
2012-11-20 13:54 ` Varun Sethi [this message]
2012-11-25 13:21   ` [PATCH 2/4] iommu/fsl: Add PAMU bypass enable register to ccsr_guts structure Kumar Gala
2012-11-20 13:54 ` [PATCH 3/4 v5] iommu/fsl: Add iommu domain attributes required by fsl PAMU driver Varun Sethi
2012-11-26  5:24   ` Sethi Varun-B16395
2012-12-02  8:12   ` Sethi Varun-B16395
2012-12-02 14:03   ` Joerg Roedel
2012-12-02 15:11     ` Tabi Timur-B04825
2012-12-03 16:57     ` Sethi Varun-B16395
2012-12-03 17:03       ` Scott Wood
2012-12-04 11:53         ` Sethi Varun-B16395
2012-12-04 18:22           ` Scott Wood
2012-12-10 10:10             ` Sethi Varun-B16395
2012-12-11  1:00               ` Scott Wood
2012-12-11  4:50                 ` Sethi Varun-B16395
2012-12-03 17:27       ` Joerg Roedel
2012-12-03 17:36         ` Scott Wood
2012-11-20 13:54 ` [PATCH 4/4 v5] iommu/fsl: Freescale PAMU driver and IOMMU API implementation Varun Sethi
2012-11-20 22:52   ` Timur Tabi
2012-12-14 13:53 [PATCH 2/4] iommu/fsl: Add PAMU bypass enable register to ccsr_guts structure Varun Sethi

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