From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423784Ab2LGSR3 (ORCPT ); Fri, 7 Dec 2012 13:17:29 -0500 Received: from hrndva-omtalb.mail.rr.com ([71.74.56.122]:25775 "EHLO hrndva-omtalb.mail.rr.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1423574Ab2LGSR1 (ORCPT ); Fri, 7 Dec 2012 13:17:27 -0500 X-Authority-Analysis: v=2.0 cv=f9bK9ZOM c=1 sm=0 a=rXTBtCOcEpjy1lPqhTCpEQ==:17 a=mNMOxpOpBa8A:10 a=0q0mCv_Vr9gA:10 a=5SG0PmZfjMsA:10 a=Q9fys5e9bTEA:10 a=meVymXHHAAAA:8 a=lrIq2vSOvhQA:10 a=FwqeT2Wgn1AdykfBn74A:9 a=PUjeQqilurYA:10 a=rXTBtCOcEpjy1lPqhTCpEQ==:117 X-Cloudmark-Score: 0 X-Authenticated-User: X-Originating-IP: 74.67.115.198 Message-ID: <1354904245.17101.66.camel@gandalf.local.home> Subject: Re: [PATCH] ARM: ftrace: Ensure code modifications are synchronised across all cpus From: Steven Rostedt To: "Jon Medhurst (Tixy)" Cc: Russell King - ARM Linux , linux-arm-kernel@lists.infradead.org, Ingo Molnar , Frederic Weisbecker , Rabin Vincent , linux-kernel@vger.kernel.org Date: Fri, 07 Dec 2012 13:17:25 -0500 In-Reply-To: <1354903568.17101.65.camel@gandalf.local.home> References: <1354817466.30905.13.camel@linaro1.home> <1354821581.17101.17.camel@gandalf.local.home> <1354872138.3176.15.camel@computer5.home> <1354888985.17101.41.camel@gandalf.local.home> <1354892111.13000.50.camel@linaro1.home> <1354894134.17101.44.camel@gandalf.local.home> <20121207162346.GW14363@n2100.arm.linux.org.uk> <1354898200.17101.50.camel@gandalf.local.home> <20121207164530.GX14363@n2100.arm.linux.org.uk> <1354900436.17101.58.camel@gandalf.local.home> <1354902347.8263.12.camel@linaro1.home> <1354903568.17101.65.camel@gandalf.local.home> Content-Type: text/plain; charset="ISO-8859-15" X-Mailer: Evolution 3.4.4-1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2012-12-07 at 13:06 -0500, Steven Rostedt wrote: > If you can get away with that, sure. Or better yet. If the arch supports > it, you can do what I did with powerpc. That was just replace the nop > with the 32bit branch, and the 32bit branch with a 32bit nop. No nops. s/No nops/No breakpoints/ > No multiple steps in between. I just did the swap of all function > tracepoints in one fell swoop, and then did the icache sync. > -- Steve