From: Vivek Gautam <gautam.vivek@samsung.com>
To: linux-samsung-soc@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
kgene.kim@samsung.com, grant.likely@secretlab.ca,
dianders@chromium.org, jg1.han@samsung.com
Subject: [PATCH v4 3/4] ARM: Exynos5250: Add clock information for dwc3-exynos
Date: Tue, 15 Jan 2013 19:08:31 +0530 [thread overview]
Message-ID: <1358257112-19595-4-git-send-email-gautam.vivek@samsung.com> (raw)
In-Reply-To: <1358257112-19595-1-git-send-email-gautam.vivek@samsung.com>
Adding necessary device clock to exynos5 needed for
the DWC3 controller.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
---
arch/arm/mach-exynos/clock-exynos5.c | 24 ++++++++++++++++++++++++
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 0208c3a..13af020 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -757,6 +757,11 @@ static struct clk exynos5_init_clocks_off[] = {
.enable = exynos5_clk_ip_fsys_ctrl ,
.ctrlbit = (1 << 18),
}, {
+ .name = "usbdrd30",
+ .parent = &exynos5_clk_aclk_200.clk,
+ .enable = exynos5_clk_ip_fsys_ctrl,
+ .ctrlbit = (1 << 19),
+ }, {
.name = "usbotg",
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 7),
@@ -1035,6 +1040,16 @@ static struct clksrc_sources exynos5_clkset_group = {
.nr_sources = ARRAY_SIZE(exynos5_clkset_group_list),
};
+struct clk *exynos5_clkset_usbdrd30_list[] = {
+ [0] = &exynos5_clk_mout_mpll.clk,
+ [1] = &exynos5_clk_mout_cpll.clk,
+};
+
+struct clksrc_sources exynos5_clkset_usbdrd30 = {
+ .sources = exynos5_clkset_usbdrd30_list,
+ .nr_sources = ARRAY_SIZE(exynos5_clkset_usbdrd30_list),
+};
+
/* Possible clock sources for aclk_266_gscl_sub Mux */
static struct clk *clk_src_gscl_266_list[] = {
[0] = &clk_ext_xtal_mux,
@@ -1329,6 +1344,15 @@ static struct clksrc_clk exynos5_clksrcs[] = {
.parent = &exynos5_clk_mout_cpll.clk,
},
.reg_div = { .reg = EXYNOS5_CLKDIV_GEN, .shift = 4, .size = 3 },
+ }, {
+ .clk = {
+ .name = "sclk_usbdrd30",
+ .enable = exynos5_clksrc_mask_fsys_ctrl,
+ .ctrlbit = (1 << 28),
+ },
+ .sources = &exynos5_clkset_usbdrd30,
+ .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 28, .size = 1 },
+ .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS0, .shift = 24, .size = 4 },
},
};
--
1.7.6.5
next prev parent reply other threads:[~2013-01-15 13:34 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-15 13:38 [PATCH v4 0/4] Enable ehci, ohci and dwc3 devices on exynos5250 Vivek Gautam
2013-01-15 13:38 ` [PATCH v4 1/4] ARM: Exynos5250: Enabling ehci-s5p driver Vivek Gautam
2013-01-16 5:21 ` Vivek Gautam
2013-01-16 5:45 ` [PATCH v5 " Vivek Gautam
2013-01-16 7:51 ` Tomasz Figa
2013-02-08 22:35 ` Kukjin Kim
2013-02-15 5:09 ` Vivek Gautam
2013-01-15 13:38 ` [PATCH v4 2/4] ARM: Exynos5250: Enabling ohci-exynos driver Vivek Gautam
2013-01-16 7:44 ` Tomasz Figa
2013-01-16 15:09 ` Vivek Gautam
2013-01-31 22:26 ` Kukjin Kim
2013-02-04 11:15 ` Vivek Gautam
2013-01-15 13:38 ` Vivek Gautam [this message]
2013-01-16 7:49 ` [PATCH v4 3/4] ARM: Exynos5250: Add clock information for dwc3-exynos Tomasz Figa
2013-01-16 15:05 ` Vivek Gautam
2013-01-23 13:15 ` Vivek Gautam
2013-01-30 6:54 ` Kukjin Kim
2013-01-29 7:07 ` Vivek Gautam
2013-01-15 13:38 ` [PATCH v4 4/4] ARM: Exynos5250: Enabling dwc3-exynos driver Vivek Gautam
2013-01-16 7:51 ` Tomasz Figa
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