From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751834AbdBBPIJ (ORCPT ); Thu, 2 Feb 2017 10:08:09 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:47568 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751754AbdBBPIH (ORCPT ); Thu, 2 Feb 2017 10:08:07 -0500 Subject: Re: [PATCH v2 1/2] ARM: davinci: Allocate extra interrupts To: David Lechner , References: <1484337612-11120-1-git-send-email-david@lechnology.com> <1484337612-11120-2-git-send-email-david@lechnology.com> <95440160-8346-fef8-27d2-fb17c0da38f6@ti.com> <25c0bc60-bb99-9aa5-db56-6299d82db9c1@lechnology.com> <0bd745dc-df46-0d37-ed18-b419c1cf2e78@ti.com> CC: Kevin Hilman , From: Sekhar Nori Message-ID: <139f2c33-7fb3-3a63-6dfe-caa2cca500ce@ti.com> Date: Thu, 2 Feb 2017 20:36:06 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday 20 January 2017 11:47 PM, David Lechner wrote: > On 01/20/2017 05:50 AM, Sekhar Nori wrote: >> On Wednesday 18 January 2017 10:27 PM, David Lechner wrote: >>> On 01/18/2017 03:50 AM, Sekhar Nori wrote: >>>> On Saturday 14 January 2017 01:30 AM, David Lechner wrote: >>>>> This allocates extra interrupts for mach-davinci. These extra >>>>> interrupts >>>>> are need for things like IIO triggers. >>>> >>>> I am not really familiar with IIO triggers. Can you give some more >>>> detail on what fails without this patch? >>> >>> A trigger is used to initiate the reading of an iio device. For example, >>> there is a mechanism for a sysfs trigger. When you write 1 to the sysfs >>> attribute, it triggers an interrupt that is handled by the iio device. >>> >>> Since these triggers use interrupts, you need to allocate spare >>> interrupts in order to set up the trigger. Otherwise, setting up the >>> trigger will fail with an error code (I forgot which one exactly) >>> because all of the allocated irqs have already been assigned to hardware >>> irqs and are not available. >>> >>> Here is where the iio subsytem actually allocates the irq: >>> http://lxr.free-electrons.com/source/drivers/iio/industrialio-trigger.c#L525 >>> >> >> Alright, I will take a look. Do note that this may not get included in >> the first batch of v4.11 changes I queue. But I promise to come back to >> it soon afterwards. >> > > It is not critical at this point, so it is fine to wait a bit. So, I think instead of increasing NR_IRQS by a small number, we should instead shift to use SPARSE_IRQ. I looked at some patches from Tony Lindgren converting OMAP1 to use SPARSE_IRQ. There is some work involved, but it does not look to be too huge a change to me. 685e2d08c54b ARM: OMAP1: Change interrupt numbering for sparse IRQ b694331cfb2e ARM: omap1: Switch to use MULTI_IRQ 55b447744389 ARM: OMAP1: Switch to use generic irqchip in preparation for sparse IRQ 928f81aa619d ARM: OMAP1: Move UART defines to prepare for sparse IRQ Thanks, Sekhar