From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933211AbaGUPlr (ORCPT ); Mon, 21 Jul 2014 11:41:47 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:5183 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932548AbaGUPkW (ORCPT ); Mon, 21 Jul 2014 11:40:22 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 21 Jul 2014 08:32:35 -0700 From: Tuomas Tynkkynen To: , , , CC: Stephen Warren , Thierry Reding , Peter De Schrijver , Prashant Gaikwad , Mike Turquette , "Rafael J. Wysocki" , Viresh Kumar , Paul Walmsley , , Tuomas Tynkkynen Subject: [PATCH v2 12/16] ARM: tegra: Enable the DFLL on the Jetson TK1 Date: Mon, 21 Jul 2014 18:38:58 +0300 Message-ID: <1405957142-19416-13-git-send-email-ttynkkynen@nvidia.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1405957142-19416-1-git-send-email-ttynkkynen@nvidia.com> References: <1405957142-19416-1-git-send-email-ttynkkynen@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the board-specific properties of the DFLL for the Jetson TK1 board. On this board, the DFLL will take control of the sd0 regulator on the on-board AS3722 PMIC. Signed-off-by: Tuomas Tynkkynen --- v2 changes: - same changes that were done to the binding in patch 3 * dropped most of the I2C properties, as they are now queried from the regulator framework * s/vdd_cpu-supply/vdd-cpu-supply/ to better match what other Tegra bindings do arch/arm/boot/dts/tegra124-jetson-tk1.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index 624b0fb..0c30450 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -1453,7 +1453,7 @@ vin-ldo9-10-supply = <&vdd_5v0_sys>; vin-ldo11-supply = <&vdd_3v3_run>; - sd0 { + vdd_cpu: sd0 { regulator-name = "+VDD_CPU_AP"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1400000>; @@ -1662,6 +1662,12 @@ non-removable; }; + dfll@0,70110000 { + status = "okay"; + vdd-cpu-supply = <&vdd_cpu>; + nvidia,i2c-fs-rate = <400000>; + }; + ahub@0,70300000 { i2s@0,70301100 { status = "okay"; -- 1.8.1.5