From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932480AbcHINSz (ORCPT ); Tue, 9 Aug 2016 09:18:55 -0400 Received: from galahad.ideasonboard.com ([185.26.127.97]:38054 "EHLO galahad.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932223AbcHINSx (ORCPT ); Tue, 9 Aug 2016 09:18:53 -0400 From: Laurent Pinchart To: Magnus Damm Cc: Geert Uytterhoeven , iommu@lists.linux-foundation.org, Laurent Pinchart , Geert Uytterhoeven , Joerg Roedel , "linux-kernel@vger.kernel.org" , linux-renesas-soc@vger.kernel.org, Simon Horman Subject: Re: [PATCH 3/3] iommu/ipmmu-vmsa: Hook up r8a7796 DT matching code Date: Tue, 09 Aug 2016 16:19:01 +0300 Message-ID: <14156780.DZdbshsptM@avalon> User-Agent: KMail/4.14.10 (Linux/4.4.6-gentoo; KDE/4.14.20; x86_64; ; ) In-Reply-To: <7796705.iS1mBl6Cq9@avalon> References: <20160607033918.28687.98260.sendpatchset@little-apple> <7796705.iS1mBl6Cq9@avalon> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 09 Aug 2016 16:17:57 Laurent Pinchart wrote: > On Wednesday 08 Jun 2016 18:12:31 Magnus Damm wrote: > > On Wed, Jun 8, 2016 at 5:48 PM, Laurent Pinchart wrote: > >> On Wednesday 08 Jun 2016 09:04:17 Geert Uytterhoeven wrote: > >>> On Wed, Jun 8, 2016 at 2:18 AM, Laurent Pinchart wrote: > >>>>> --- 0031/drivers/iommu/ipmmu-vmsa.c > >>>>> +++ work/drivers/iommu/ipmmu-vmsa.c 2016-06-06 11:19:40.210607110 > > [snip] > > >>>>> @@ -1268,6 +1271,8 @@ IOMMU_OF_DECLARE(ipmmu_vmsa_iommu_of, "r > >>>>> ipmmu_vmsa_iommu_of_setup); > >>>>> IOMMU_OF_DECLARE(ipmmu_r8a7795_iommu_of, "renesas,ipmmu-r8a7795", > >>>>> ipmmu_vmsa_iommu_of_setup); > >>>>> +IOMMU_OF_DECLARE(ipmmu_r8a7796_iommu_of, "renesas,ipmmu-r8a7796", > >>>>> + ipmmu_vmsa_iommu_of_setup); > >>>> > >>>> How about a Gen3 generic compatible string in addition to the > >>>> SoC-specific ones ? > >>> > >>> Do we want to specify the number of utlbs here? > >>> Does it differ between r8a7795, r8a7796, and future members? > >> > >> It differs between IPMMU instances on a given SoC, so if we want to > >> specify it it should be a DT property. > > > > Can you please point out which documentation that says it varies with > > IPMMU instance? > > > > Based on IMUCTRn register description "H3-ES1" has 0-31 range while > > "Others" have 0-47. > > The maximum number of uTLBs is indeed the same according to that part of the > documentation, but not all uTLBs are available in all IPMMU instances. We > even have holes in the uTLB ranges, maybe a mask would be more appropriate. And the other option is of course to ignore that and accept any uTLB number, in which case we will rely on the IOMMU bus master node providing correct information. -- Regards, Laurent Pinchart