From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754581AbaKRMYR (ORCPT ); Tue, 18 Nov 2014 07:24:17 -0500 Received: from mail-wg0-f48.google.com ([74.125.82.48]:35996 "EHLO mail-wg0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754554AbaKRMYN (ORCPT ); Tue, 18 Nov 2014 07:24:13 -0500 From: Tomeu Vizoso To: linux-tegra@vger.kernel.org Cc: Javier Martinez Canillas , mikko.perttunen@kapsi.fi, acourbot@nvidia.com, Tomeu Vizoso , Peter De Schrijver , Prashant Gaikwad , Mike Turquette , Stephen Warren , Thierry Reding , Alexandre Courbot , linux-kernel@vger.kernel.org Subject: [PATCH v5 14/14] clk: tegra: Set the EMC clock as the parent of the MC clock Date: Tue, 18 Nov 2014 13:13:16 +0100 Message-Id: <1416312860-4446-15-git-send-email-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1416312860-4446-1-git-send-email-tomeu.vizoso@collabora.com> References: <1416312860-4446-1-git-send-email-tomeu.vizoso@collabora.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tegra124, as we now have a proper driver for the EMC. Signed-off-by: Tomeu Vizoso --- drivers/clk/tegra/clk-tegra124.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index d56d1e2..0ac43d6 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -150,11 +150,6 @@ static const char *mux_plld_out0_plld2_out0[] = { }; #define mux_plld_out0_plld2_out0_idx NULL -static const char *mux_pllmcp_clkm[] = { - "pll_m", "pll_c", "pll_p", "clk_m", "pll_m_ud", "pll_c2", "pll_c3", -}; -#define mux_pllmcp_clkm_idx NULL - static struct div_nmp pllxc_nmp = { .divm_shift = 0, .divm_width = 8, @@ -1123,13 +1118,7 @@ static __init void tegra124_periph_clk_init(void __iomem *clk_base, clk_base + PLLD2_BASE, 25, 1, 0, &pll_d2_lock); clks[TEGRA124_CLK_DSIB_MUX] = clk; - /* emc mux */ - clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm, - ARRAY_SIZE(mux_pllmcp_clkm), 0, - clk_base + CLK_SOURCE_EMC, - 29, 3, 0, &emc_lock); - - clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC, + clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, &emc_lock); clks[TEGRA124_CLK_MC] = clk; -- 1.9.3