From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932697AbbBBGv7 (ORCPT ); Mon, 2 Feb 2015 01:51:59 -0500 Received: from nasmtp01.atmel.com ([192.199.1.246]:35647 "EHLO DVREDG02.corp.atmel.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932633AbbBBGv4 (ORCPT ); Mon, 2 Feb 2015 01:51:56 -0500 From: Bo Shen To: CC: , , , Bo Shen Subject: [PATCH 1/4] ARM: at91: dt: sama5d4: add ssc nodes Date: Mon, 2 Feb 2015 14:51:44 +0800 Message-ID: <1422859907-14881-2-git-send-email-voice.shen@atmel.com> X-Mailer: git-send-email 2.3.0.rc0 In-Reply-To: <1422859907-14881-1-git-send-email-voice.shen@atmel.com> References: <1422859907-14881-1-git-send-email-voice.shen@atmel.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add SSC 0 and 1 nodes. Signed-off-by: Bo Shen --- arch/arm/boot/dts/sama5d4.dtsi | 70 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index b94995d..0b3e5f4 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -66,6 +66,8 @@ tcb0 = &tcb0; tcb1 = &tcb1; i2c2 = &i2c2; + ssc0 = &ssc0; + ssc1 = &ssc1; }; cpus { #address-cells = <1>; @@ -793,6 +795,24 @@ clock-names = "mci_clk"; }; + ssc0: ssc@f8008000 { + compatible = "atmel,at91sam9g45-ssc"; + reg = <0xf8008000 0x4000>; + interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; + dmas = <&dma1 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) + | AT91_XDMAC_DT_PERID(26))>, + <&dma1 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) + | AT91_XDMAC_DT_PERID(27))>; + dma-names = "tx", "rx"; + clocks = <&ssc0_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + spi0: spi@f8010000 { #address-cells = <1>; #size-cells = <0>; @@ -941,6 +961,24 @@ status = "disabled"; }; + ssc1: ssc@fc014000 { + compatible = "atmel,at91sam9g45-ssc"; + reg = <0xfc014000 0x4000>; + interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; + dmas = <&dma1 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) + | AT91_XDMAC_DT_PERID(28))>, + <&dma1 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) + | AT91_XDMAC_DT_PERID(29))>; + dma-names = "tx", "rx"; + clocks = <&ssc1_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + tcb1: timer@fc020000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xfc020000 0x100>; @@ -1295,6 +1333,38 @@ atmel,pins = ; /* conflicts with A0/NBS0, MCI0_CDB */ }; }; + + ssc0 { + pinctrl_ssc0_tx: ssc0_tx { + atmel,pins = + ; /* PB28 periph B TD0 */ + }; + + pinctrl_ssc0_rx: ssc0_rx { + atmel,pins = + ; /* PB29 periph B RD0 */ + }; + }; + + ssc1 { + pinctrl_ssc1_tx: ssc1_tx { + atmel,pins = + ; /* PC21 periph B TD1 */ + }; + + pinctrl_ssc1_rx: ssc1_rx { + atmel,pins = + ; /* PC23 periph B RD1 */ + }; + }; }; aic: interrupt-controller@fc06e000 { -- 2.3.0.rc0