From: Andy Gross <agross@codeaurora.org>
To: Vinod Koul <vinod.koul@intel.com>
Cc: devicetree@vger.kernel.org, dmaengine@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Kumar Gala <galak@codeaurora.org>,
Bjorn Andersson <bjorn.andersson@sonymobile.com>,
Andy Gross <agross@codeaurora.org>
Subject: [Patch v6 1/2] dt/bindings: qcom_adm: Fix channel specifiers
Date: Tue, 17 Mar 2015 00:46:11 -0500 [thread overview]
Message-ID: <1426571172-9711-2-git-send-email-agross@codeaurora.org> (raw)
In-Reply-To: <1426571172-9711-1-git-send-email-agross@codeaurora.org>
This patch removes the crci information from the dma channel property. At least
one client device requires using more than one CRCI value for a channel. This
does not match the current binding and the crci information needs to be removed.
Instead, the client device will provide this information via other means.
Signed-off-by: Andy Gross <agross@codeaurora.org>
---
Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt b/Documentation/devicetree/bindings/dma/qcom_adm.txt
index 9bcab91..38d45f8 100644
--- a/Documentation/devicetree/bindings/dma/qcom_adm.txt
+++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt
@@ -4,8 +4,7 @@ Required properties:
- compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960
- reg: Address range for DMA registers
- interrupts: Should contain one interrupt shared by all channels
-- #dma-cells: must be <2>. First cell denotes the channel number. Second cell
- denotes CRCI (client rate control interface) flow control assignment.
+- #dma-cells: must be <1>. First cell denotes the channel number.
- clocks: Should contain the core clock and interface clock.
- clock-names: Must contain "core" for the core clock and "iface" for the
interface clock.
@@ -22,7 +21,7 @@ Example:
compatible = "qcom,adm";
reg = <0x18300000 0x100000>;
interrupts = <0 170 0>;
- #dma-cells = <2>;
+ #dma-cells = <1>;
clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
clock-names = "core", "iface";
@@ -35,15 +34,12 @@ Example:
qcom,ee = <0>;
};
-DMA clients must use the format descripted in the dma.txt file, using a three
+DMA clients must use the format descripted in the dma.txt file, using a two
cell specifier for each channel.
-Each dmas request consists of 3 cells:
+Each dmas request consists of two cells:
1. phandle pointing to the DMA controller
2. channel number
- 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0.
- The CRCI is used for flow control. It identifies the peripheral device that
- is the source/destination for the transferred data.
Example:
@@ -56,7 +52,7 @@ Example:
cs-gpios = <&qcom_pinmux 20 0>;
- dmas = <&adm_dma 6 9>,
- <&adm_dma 5 10>;
+ dmas = <&adm_dma 6>,
+ <&adm_dma 5>;
dma-names = "rx", "tx";
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
next prev parent reply other threads:[~2015-03-17 5:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-17 5:46 [Patch v6 0/2] Add Qualcomm ADM dmaengine driver Andy Gross
2015-03-17 5:46 ` Andy Gross [this message]
2015-03-17 5:46 ` [Patch v6 2/2] dmaengine: Add ADM driver Andy Gross
2015-03-20 6:47 ` Sricharan
2015-04-01 3:32 ` Vinod Koul
2015-05-21 8:32 ` Archit Taneja
2016-06-21 8:09 ` [Patch v6 0/2] Add Qualcomm ADM dmaengine driver Neil Armstrong
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