From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753380AbbDAKJ1 (ORCPT ); Wed, 1 Apr 2015 06:09:27 -0400 Received: from mga09.intel.com ([134.134.136.24]:11784 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752519AbbDAKJN (ORCPT ); Wed, 1 Apr 2015 06:09:13 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,503,1422950400"; d="scan'208";a="475364527" From: Andy Shevchenko To: Stephen Boyd , linux-kernel@vger.kernel.org, heikki.krogerus@linux.intel.com Cc: Andy Shevchenko Subject: [PATCH v3 2/3] clk: fractional-divider: keep mwidth and nwidth internally Date: Wed, 1 Apr 2015 13:09:07 +0300 Message-Id: <1427882948-97260-3-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1427882948-97260-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1427882948-97260-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The patch adds mwidth and nwidth fields to the struct clk_fractional_divider for further usage. While here, use clk_div_mask() instead of open coding this functionality. Signed-off-by: Andy Shevchenko --- drivers/clk/clk-fractional-divider.c | 8 +++++--- include/linux/clk-provider.h | 3 ++- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c index 786aa482..23a56a0 100644 --- a/drivers/clk/clk-fractional-divider.c +++ b/drivers/clk/clk-fractional-divider.c @@ -50,7 +50,7 @@ static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) { struct clk_fractional_divider *fd = to_clk_fd(hw); - unsigned maxn = (fd->nmask >> fd->nshift) + 1; + unsigned maxn = clk_div_mask(fd->nwidth) + 1; unsigned div; if (!rate || rate >= *prate) @@ -130,9 +130,11 @@ struct clk *clk_register_fractional_divider(struct device *dev, fd->reg = reg; fd->mshift = mshift; - fd->mmask = (BIT(mwidth) - 1) << mshift; + fd->mwidth = mwidth; + fd->mmask = clk_div_mask(mwidth) << mshift; fd->nshift = nshift; - fd->nmask = (BIT(nwidth) - 1) << nshift; + fd->nwidth = nwidth; + fd->nmask = clk_div_mask(nwidth) << nshift; fd->flags = clk_divider_flags; fd->lock = lock; fd->hw.init = &init; diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 20b0b67..eb3c96f 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -480,13 +480,14 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name, * * Clock with adjustable fractional divider affecting its output frequency. */ - struct clk_fractional_divider { struct clk_hw hw; void __iomem *reg; u8 mshift; + u8 mwidth; u32 mmask; u8 nshift; + u8 nwidth; u32 nmask; u8 flags; spinlock_t *lock; -- 2.1.4