From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751801AbbDCFAw (ORCPT ); Fri, 3 Apr 2015 01:00:52 -0400 Received: from mail-bn1bon0080.outbound.protection.outlook.com ([157.56.111.80]:21305 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751247AbbDCFAn (ORCPT ); Fri, 3 Apr 2015 01:00:43 -0400 Authentication-Results: spf=fail (sender IP is 66.35.236.227) smtp.mailfrom=opensource.altera.com; arm.linux.org.uk; dkim=none (message not signed) header.d=none; From: To: , , , , , , , , CC: , , , , Dinh Nguyen Subject: [PATCH 0/7] ARM: socfpga: Add support for Arria10 devkit Date: Thu, 2 Apr 2015 23:39:51 -0500 Message-ID: <1428035998-27542-1-git-send-email-dinguyen@opensource.altera.com> X-Mailer: git-send-email 2.2.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BLUPR01CA021.prod.exchangelabs.com (25.160.23.11) To BN3PR03MB1368.namprd03.prod.outlook.com (25.163.34.154) Authentication-Results: arm.linux.org.uk; dkim=none (message not signed) header.d=none; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN3PR03MB1368;UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN1PR03MB008; X-Forefront-Antispam-Report-Untrusted: BMV:1;SFV:NSPM;SFS:(10009020)(6009001)(19580405001)(122386002)(87976001)(19580395003)(229853001)(86152002)(40100003)(62966003)(2201001)(48376002)(77156002)(86362001)(92566002)(33646002)(46102003)(66066001)(47776003)(42186005)(50466002)(50986999)(53416004)(50226001);DIR:OUT;SFP:1101;SCL:1;SRVR:BN3PR03MB1368;H:linux-builds1.altera.com;FPR:;SPF:None;MLV:sfv;LANG:en; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:;UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5002010)(5005006);SRVR:BN3PR03MB1368;BCL:0;PCL:0;RULEID:;SRVR:BN3PR03MB1368;BCL:0;PCL:0;RULEID:(601004)(5005006)(5002010);SRVR:BN1PR03MB008;BCL:0;PCL:0;RULEID:;SRVR:BN1PR03MB008; X-Forefront-PRVS: 05352A48BE X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN3PR03MB1368 X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: BY2FFO11OLC004.protection.gbl X-Forefront-Antispam-Report: CIP:66.35.236.227;CTRY:US;IPV:NLI;EFV:NLI;BMV:1;SFV:NSPM;SFS:(10009020)(6009001)(339900001)(189002)(199003)(50466002)(47776003)(53416004)(64706001)(229853001)(105606002)(106466001)(16796002)(85426001)(19580405001)(66066001)(6806004)(19580395003)(2201001)(87936001)(86152002)(50986999)(46102003)(122386002)(40100003)(50226001)(92566002)(48376002)(86362001)(62966003)(33646002)(77156002)(7099025);DIR:OUT;SFP:1101;SCL:1;SRVR:BN1PR03MB008;H:sj-itexedge03.altera.priv.altera.com;FPR:;SPF:Fail;MLV:ovrnspm;MX:1;A:0;PTR:InfoDomainNonexistent;LANG:en; X-Forefront-PRVS: 05352A48BE X-OriginatorOrg: opensource.altera.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2015 04:45:31.7128 (UTC) X-MS-Exchange-CrossTenant-Id: fbd72e03-d4a5-4110-adce-614d51f2077a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fbd72e03-d4a5-4110-adce-614d51f2077a;Ip=[66.35.236.227];Helo=[sj-itexedge03.altera.priv.altera.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1PR03MB008 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dinh Nguyen Hi, This patchset enables and tidy up support for the Arria10 devkit. Along with this patchset and the patch for enabling clocks on the Arria10, the devkit can boot Linux. Dinh Nguyen (7): ARM: socfpga: add cpu1-start-addr for Arria 10 ARM: socfpga: disable the sdmmc, and uart nodes in the base arria10 ARM: socfpga: dts: enable UART1 for the debug uart ARM: socfpga: rename socdk board file to socdk_sdmmc ARM: socfpga: Add support for UART1 debug uart for earlyprintk ARM: socfpga: remove the need to map uart_io_desc Documentation: DT bindings: add doc for Altera's SoCFPGA platform Documentation/devicetree/bindings/arm/altera.txt | 14 ++++++++++++ arch/arm/Kconfig.debug | 25 +++++++++++++++------ arch/arm/boot/dts/Makefile | 2 +- arch/arm/boot/dts/socfpga_arria10.dtsi | 4 ++++ ...rria10_socdk.dts => socfpga_arria10_socdk.dtsi} | 6 ++--- arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts | 26 ++++++++++++++++++++++ arch/arm/mach-socfpga/socfpga.c | 9 -------- 7 files changed, 65 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/altera.txt rename arch/arm/boot/dts/{socfpga_arria10_socdk.dts => socfpga_arria10_socdk.dtsi} (92%) mode change 100755 => 100644 create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts -- 2.2.1