From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751570AbbDCFAt (ORCPT ); Fri, 3 Apr 2015 01:00:49 -0400 Received: from mail-by2on0064.outbound.protection.outlook.com ([207.46.100.64]:24498 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751173AbbDCFAh (ORCPT ); Fri, 3 Apr 2015 01:00:37 -0400 Authentication-Results: spf=fail (sender IP is 66.35.236.236) smtp.mailfrom=opensource.altera.com; codeaurora.org; dkim=none (message not signed) header.d=none; From: To: , CC: , , , , , , , , , "Dinh Nguyen" Subject: [PATCH 0/3] clk: socfpga: Add clock driver for Arria10 Date: Thu, 2 Apr 2015 23:40:52 -0500 Message-ID: <1428036055-27607-1-git-send-email-dinguyen@opensource.altera.com> X-Mailer: git-send-email 2.2.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BLUPR08CA0061.namprd08.prod.outlook.com (10.141.200.41) To BY1PR03MB1370.namprd03.prod.outlook.com (25.162.109.28) Authentication-Results: codeaurora.org; dkim=none (message not signed) header.d=none; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR03MB1370;UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY2PR03MB011; X-Forefront-Antispam-Report-Untrusted: BMV:1;SFV:NSPM;SFS:(10009020)(6009001)(229853001)(86152002)(62966003)(86362001)(42186005)(53416004)(92566002)(40100003)(33646002)(47776003)(50226001)(77156002)(122386002)(50986999)(46102003)(50466002)(19580395003)(66066001)(19580405001)(87976001)(48376002);DIR:OUT;SFP:1101;SCL:1;SRVR:BY1PR03MB1370;H:linux-builds1.altera.com;FPR:;SPF:None;MLV:sfv;LANG:en; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:;UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5002010)(5005006);SRVR:BY1PR03MB1370;BCL:0;PCL:0;RULEID:;SRVR:BY1PR03MB1370;BCL:0;PCL:0;RULEID:(601004)(5005006)(5002010);SRVR:BY2PR03MB011;BCL:0;PCL:0;RULEID:;SRVR:BY2PR03MB011; X-Forefront-PRVS: 05352A48BE X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR03MB1370 X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: BY2FFO11OLC010.protection.gbl X-Forefront-Antispam-Report: CIP:66.35.236.236;CTRY:US;IPV:NLI;EFV:NLI;BMV:1;SFV:NSPM;SFS:(10009020)(6009001)(339900001)(189002)(199003)(64706001)(53416004)(106466001)(86362001)(40100003)(47776003)(66066001)(122386002)(105606002)(33646002)(86152002)(229853001)(50466002)(87936001)(85426001)(19580395003)(19580405001)(50986999)(62966003)(50226001)(16796002)(77156002)(48376002)(46102003)(6806004)(92566002)(7099025);DIR:OUT;SFP:1101;SCL:1;SRVR:BY2PR03MB011;H:sj-itexedge04.altera.priv.altera.com;FPR:;SPF:Fail;MLV:ovrnspm;MX:1;A:0;PTR:InfoDomainNonexistent;LANG:en; X-Forefront-PRVS: 05352A48BE X-OriginatorOrg: opensource.altera.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2015 04:46:14.2131 (UTC) X-MS-Exchange-CrossTenant-Id: fbd72e03-d4a5-4110-adce-614d51f2077a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fbd72e03-d4a5-4110-adce-614d51f2077a;Ip=[66.35.236.236];Helo=[sj-itexedge04.altera.priv.altera.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY2PR03MB011 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dinh Nguyen Hi, This patch series add the clock driver for the Arria10 platform. Although the Arria10 SoC's clock framework has some similarities the Cyclone/Arria 5, the differences are enough to warrant it's own driver, rather than polluting the existing driver with platform lookups. Dinh Nguyen (3): clk: socfpga: update clk.h so for Arria10 platform to use clk: socfpga: add a clock driver for the Arria 10 platform ARM: socfpga: dts: add clocks to the Arria10 platform arch/arm/boot/dts/socfpga_arria10.dtsi | 298 ++++++++++++++++++++++++++++++++- drivers/clk/socfpga/Makefile | 1 + drivers/clk/socfpga/clk-gate-a10.c | 187 +++++++++++++++++++++ drivers/clk/socfpga/clk-gate.c | 4 - drivers/clk/socfpga/clk-periph-a10.c | 131 +++++++++++++++ drivers/clk/socfpga/clk-pll-a10.c | 132 +++++++++++++++ drivers/clk/socfpga/clk.c | 7 +- drivers/clk/socfpga/clk.h | 10 +- 8 files changed, 760 insertions(+), 10 deletions(-) create mode 100644 drivers/clk/socfpga/clk-gate-a10.c create mode 100644 drivers/clk/socfpga/clk-periph-a10.c create mode 100644 drivers/clk/socfpga/clk-pll-a10.c -- 2.2.1