From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932235AbbETPID (ORCPT ); Wed, 20 May 2015 11:08:03 -0400 Received: from cmrelayp1.emulex.com ([138.239.112.140]:60893 "EHLO CMRELAYP1.ad.emulex.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S932105AbbETPHz (ORCPT ); Wed, 20 May 2015 11:07:55 -0400 From: Parav Pandit To: linux-nvme@lists.infradead.org, willy@linux.intel.com Cc: parav.pandit@avagotech.com, axboe@kernel.dk, linux-kernel@vger.kernel.org Subject: [PATCHv1] NVMe: nvme_queue made cache friendly. Date: Wed, 20 May 2015 16:43:47 -0400 Message-Id: <1432154627-12336-1-git-send-email-parav.pandit@avagotech.com> X-Mailer: git-send-email 1.8.3.1 X-OriginalArrivalTime: 20 May 2015 15:07:54.0840 (UTC) FILETIME=[BFADAD80:01D0930E] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org nvme_queue structure made 64B cache friendly so that majority of the data elements of the structure during IO and completion path can be found in typical single 64B cache line size which was previously spanning beyond single 64B cache line size. By aligning most of the fields are found at start of the structure. Elements which are not used in frequent IO path are moved at the end of structure. Signed-off-by: Parav Pandit --- drivers/block/nvme-core.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/block/nvme-core.c b/drivers/block/nvme-core.c index b9ba36f..58041c7 100644 --- a/drivers/block/nvme-core.c +++ b/drivers/block/nvme-core.c @@ -98,23 +98,23 @@ struct async_cmd_info { struct nvme_queue { struct device *q_dmadev; struct nvme_dev *dev; - char irqname[24]; /* nvme4294967295-65535\0 */ - spinlock_t q_lock; struct nvme_command *sq_cmds; + struct blk_mq_hw_ctx *hctx; volatile struct nvme_completion *cqes; - dma_addr_t sq_dma_addr; - dma_addr_t cq_dma_addr; u32 __iomem *q_db; + spinlock_t q_lock; u16 q_depth; - s16 cq_vector; u16 sq_head; u16 sq_tail; u16 cq_head; u16 qid; + s16 cq_vector; u8 cq_phase; u8 cqe_seen; struct async_cmd_info cmdinfo; - struct blk_mq_hw_ctx *hctx; + char irqname[24]; /* nvme4294967295-65535\0 */ + dma_addr_t sq_dma_addr; + dma_addr_t cq_dma_addr; }; /* -- 1.8.3.1