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From: Borislav Petkov <bp@alien8.de>
To: Ingo Molnar <mingo@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH 12/20] x86/mm: Add set_memory_wt() for Write-Through type
Date: Thu,  4 Jun 2015 18:55:20 +0200
Message-ID: <1433436928-31903-13-git-send-email-bp@alien8.de> (raw)
In-Reply-To: <1433436928-31903-1-git-send-email-bp@alien8.de>

From: Toshi Kani <toshi.kani@hp.com>

Now that reserve_ram_pages_type() accepts the WT type, add
set_memory_wt(), set_memory_array_wt() and set_pages_array_wt() in order
to be able to set memory to Write-Through page cache mode.

Also, extend ioremap_change_attr() to accept the WT type.

Signed-off-by: Toshi Kani <toshi.kani@hp.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: arnd@arndb.de
Cc: Elliott@hp.com
Cc: hch@lst.de
Cc: hmh@hmh.eng.br
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: jgross@suse.com
Cc: konrad.wilk@oracle.com
Cc: linux-mm <linux-mm@kvack.org>
Cc: linux-nvdimm@lists.01.org
Cc: Luis R. Rodriguez <mcgrof@suse.com>
Cc: stefan.bader@canonical.com
Cc: x86-ml <x86@kernel.org>
Cc: yigal@plexistor.com
Link: http://lkml.kernel.org/r/1433187393-22688-10-git-send-email-toshi.kani@hp.com
Signed-off-by: Borislav Petkov <bp@suse.de>
---
 Documentation/x86/pat.txt         |  9 ++++--
 arch/x86/include/asm/cacheflush.h |  6 +++-
 arch/x86/mm/ioremap.c             |  3 ++
 arch/x86/mm/pageattr.c            | 62 +++++++++++++++++++++++++++++++--------
 4 files changed, 63 insertions(+), 17 deletions(-)

diff --git a/Documentation/x86/pat.txt b/Documentation/x86/pat.txt
index db0de6cfc351..54944c71b819 100644
--- a/Documentation/x86/pat.txt
+++ b/Documentation/x86/pat.txt
@@ -48,6 +48,9 @@ set_memory_uc          |    UC-   |    --      |       --         |
 set_memory_wc          |    WC    |    --      |       --         |
  set_memory_wb         |          |            |                  |
                        |          |            |                  |
+set_memory_wt          |    WT    |    --      |       --         |
+ set_memory_wb         |          |            |                  |
+                       |          |            |                  |
 pci sysfs resource     |    --    |    --      |       UC-        |
                        |          |            |                  |
 pci sysfs resource_wc  |    --    |    --      |       WC         |
@@ -150,8 +153,8 @@ can be more restrictive, in case of any existing aliasing for that address.
 For example: If there is an existing uncached mapping, a new ioremap_wc can
 return uncached mapping in place of write-combine requested.
 
-set_memory_[uc|wc] and set_memory_wb should be used in pairs, where driver will
-first make a region uc or wc and switch it back to wb after use.
+set_memory_[uc|wc|wt] and set_memory_wb should be used in pairs, where driver
+will first make a region uc, wc or wt and switch it back to wb after use.
 
 Over time writes to /proc/mtrr will be deprecated in favor of using PAT based
 interfaces. Users writing to /proc/mtrr are suggested to use above interfaces.
@@ -159,7 +162,7 @@ interfaces. Users writing to /proc/mtrr are suggested to use above interfaces.
 Drivers should use ioremap_[uc|wc] to access PCI BARs with [uc|wc] access
 types.
 
-Drivers should use set_memory_[uc|wc] to set access type for RAM ranges.
+Drivers should use set_memory_[uc|wc|wt] to set access type for RAM ranges.
 
 
 PAT debugging
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 47c8e32f621a..b6f7457d12e4 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -8,7 +8,7 @@
 /*
  * The set_memory_* API can be used to change various attributes of a virtual
  * address range. The attributes include:
- * Cachability   : UnCached, WriteCombining, WriteBack
+ * Cachability   : UnCached, WriteCombining, WriteThrough, WriteBack
  * Executability : eXeutable, NoteXecutable
  * Read/Write    : ReadOnly, ReadWrite
  * Presence      : NotPresent
@@ -35,9 +35,11 @@
 
 int _set_memory_uc(unsigned long addr, int numpages);
 int _set_memory_wc(unsigned long addr, int numpages);
+int _set_memory_wt(unsigned long addr, int numpages);
 int _set_memory_wb(unsigned long addr, int numpages);
 int set_memory_uc(unsigned long addr, int numpages);
 int set_memory_wc(unsigned long addr, int numpages);
+int set_memory_wt(unsigned long addr, int numpages);
 int set_memory_wb(unsigned long addr, int numpages);
 int set_memory_x(unsigned long addr, int numpages);
 int set_memory_nx(unsigned long addr, int numpages);
@@ -48,10 +50,12 @@ int set_memory_4k(unsigned long addr, int numpages);
 
 int set_memory_array_uc(unsigned long *addr, int addrinarray);
 int set_memory_array_wc(unsigned long *addr, int addrinarray);
+int set_memory_array_wt(unsigned long *addr, int addrinarray);
 int set_memory_array_wb(unsigned long *addr, int addrinarray);
 
 int set_pages_array_uc(struct page **pages, int addrinarray);
 int set_pages_array_wc(struct page **pages, int addrinarray);
+int set_pages_array_wt(struct page **pages, int addrinarray);
 int set_pages_array_wb(struct page **pages, int addrinarray);
 
 /*
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 07cd46a8f30a..8405c0c6a535 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -42,6 +42,9 @@ int ioremap_change_attr(unsigned long vaddr, unsigned long size,
 	case _PAGE_CACHE_MODE_WC:
 		err = _set_memory_wc(vaddr, nrpages);
 		break;
+	case _PAGE_CACHE_MODE_WT:
+		err = _set_memory_wt(vaddr, nrpages);
+		break;
 	case _PAGE_CACHE_MODE_WB:
 		err = _set_memory_wb(vaddr, nrpages);
 		break;
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 94aae76a5e06..d908f197c58f 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1502,12 +1502,10 @@ EXPORT_SYMBOL(set_memory_uc);
 static int _set_memory_array(unsigned long *addr, int addrinarray,
 		enum page_cache_mode new_type)
 {
+	enum page_cache_mode set_type;
 	int i, j;
 	int ret;
 
-	/*
-	 * for now UC MINUS. see comments in ioremap_nocache()
-	 */
 	for (i = 0; i < addrinarray; i++) {
 		ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
 					new_type, NULL);
@@ -1515,9 +1513,12 @@ static int _set_memory_array(unsigned long *addr, int addrinarray,
 			goto out_free;
 	}
 
+	/* If WC, set to UC- first and then WC */
+	set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
+				_PAGE_CACHE_MODE_UC_MINUS : new_type;
+
 	ret = change_page_attr_set(addr, addrinarray,
-				   cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
-				   1);
+				   cachemode2pgprot(set_type), 1);
 
 	if (!ret && new_type == _PAGE_CACHE_MODE_WC)
 		ret = change_page_attr_set_clr(addr, addrinarray,
@@ -1549,6 +1550,12 @@ int set_memory_array_wc(unsigned long *addr, int addrinarray)
 }
 EXPORT_SYMBOL(set_memory_array_wc);
 
+int set_memory_array_wt(unsigned long *addr, int addrinarray)
+{
+	return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
+}
+EXPORT_SYMBOL_GPL(set_memory_array_wt);
+
 int _set_memory_wc(unsigned long addr, int numpages)
 {
 	int ret;
@@ -1574,21 +1581,39 @@ int set_memory_wc(unsigned long addr, int numpages)
 	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
 		_PAGE_CACHE_MODE_WC, NULL);
 	if (ret)
-		goto out_err;
+		return ret;
 
 	ret = _set_memory_wc(addr, numpages);
 	if (ret)
-		goto out_free;
+		free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
 
-	return 0;
-
-out_free:
-	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
-out_err:
 	return ret;
 }
 EXPORT_SYMBOL(set_memory_wc);
 
+int _set_memory_wt(unsigned long addr, int numpages)
+{
+	return change_page_attr_set(&addr, numpages,
+				    cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
+}
+
+int set_memory_wt(unsigned long addr, int numpages)
+{
+	int ret;
+
+	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
+			      _PAGE_CACHE_MODE_WT, NULL);
+	if (ret)
+		return ret;
+
+	ret = _set_memory_wt(addr, numpages);
+	if (ret)
+		free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(set_memory_wt);
+
 int _set_memory_wb(unsigned long addr, int numpages)
 {
 	/* WB cache mode is hard wired to all cache attribute bits being 0 */
@@ -1679,6 +1704,7 @@ static int _set_pages_array(struct page **pages, int addrinarray,
 {
 	unsigned long start;
 	unsigned long end;
+	enum page_cache_mode set_type;
 	int i;
 	int free_idx;
 	int ret;
@@ -1692,8 +1718,12 @@ static int _set_pages_array(struct page **pages, int addrinarray,
 			goto err_out;
 	}
 
+	/* If WC, set to UC- first and then WC */
+	set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
+				_PAGE_CACHE_MODE_UC_MINUS : new_type;
+
 	ret = cpa_set_pages_array(pages, addrinarray,
-			cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS));
+				  cachemode2pgprot(set_type));
 	if (!ret && new_type == _PAGE_CACHE_MODE_WC)
 		ret = change_page_attr_set_clr(NULL, addrinarray,
 					       cachemode2pgprot(
@@ -1727,6 +1757,12 @@ int set_pages_array_wc(struct page **pages, int addrinarray)
 }
 EXPORT_SYMBOL(set_pages_array_wc);
 
+int set_pages_array_wt(struct page **pages, int addrinarray)
+{
+	return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
+}
+EXPORT_SYMBOL_GPL(set_pages_array_wt);
+
 int set_pages_wb(struct page *page, int numpages)
 {
 	unsigned long addr = (unsigned long)page_address(page);
-- 
2.3.5


  parent reply index

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-04 16:55 [PATCH 00/20] tip queue 2015-06-04 Borislav Petkov
2015-06-04 16:55 ` [PATCH 01/20] x86/mm/pat: Untangle pat_init() Borislav Petkov
2015-06-07 17:39   ` [tip:x86/mm] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 02/20] x86/mm/pat: Emulate PAT when it is disabled Borislav Petkov
2015-06-07 17:39   ` [tip:x86/mm] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 03/20] x86/mm/pat: Remove pat_enabled() checks Borislav Petkov
2015-06-07 17:40   ` [tip:x86/mm] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 04/20] x86/mm/pat: Use 7th PAT MSR slot for Write-Through PAT type Borislav Petkov
2015-06-04 16:55 ` [PATCH 05/20] x86/mm/pat: Change reserve_memtype() for Write-Through type Borislav Petkov
2015-06-07 17:40   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 06/20] x86/mm: Teach is_new_memtype_allowed() about " Borislav Petkov
2015-06-07 17:41   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 07/20] x86/mm, asm-generic: Add ioremap_wt() for creating Write-Through mappings Borislav Petkov
2015-06-07 17:41   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 08/20] arch/*/io.h: Add ioremap_wt() to all architectures Borislav Petkov
2015-06-07 17:41   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 09/20] video/fbdev, asm/io.h: Remove ioremap_writethrough() Borislav Petkov
2015-06-07 17:41   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 10/20] x86/mm/pat: Add pgprot_writethrough() Borislav Petkov
2015-06-07 17:42   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 11/20] x86/mm/pat: Extend set_page_memtype() to support Write-Through type Borislav Petkov
2015-06-07 17:42   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` Borislav Petkov [this message]
2015-06-07 17:42   ` [tip:x86/mm] x86/mm/pat: Add set_memory_wt() for " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 13/20] drivers/block/pmem: Map NVDIMM in Write-Through mode Borislav Petkov
2015-06-07 17:43   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 14/20] x86/mce: Add Local MCE definitions Borislav Petkov
2015-06-07 17:43   ` [tip:x86/core] " tip-bot for Ashok Raj
2015-06-04 16:55 ` [PATCH 15/20] x86/mce: Add infrastructure to support Local MCE Borislav Petkov
2015-06-07 17:43   ` [tip:x86/core] " tip-bot for Ashok Raj
2015-06-04 16:55 ` [PATCH 16/20] x86/mce: Handle Local MCE events Borislav Petkov
2015-06-07 17:44   ` [tip:x86/core] " tip-bot for Ashok Raj
2015-06-04 16:55 ` [PATCH 17/20] x86: Kill CONFIG_X86_HT Borislav Petkov
2015-06-07 17:44   ` [tip:x86/core] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 18/20] x86/uapi: Do not export <asm/msr-index.h> as part of the user API headers Borislav Petkov
2015-06-07 17:44   ` [tip:x86/core] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 19/20] x86/microcode: Disable builtin microcode loading on 32-bit for now Borislav Petkov
2015-06-07 17:45   ` [tip:x86/microcode] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 20/20] x86/microcode: Correct variables type Borislav Petkov
2015-06-07 17:45   ` [tip:x86/microcode] x86/microcode: Correct CPU family related variable types tip-bot for Andy Shevchenko

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