From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: <linux-arch@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <arnd@arndb.de>, Alexey Brodkin <Alexey.Brodkin@synopsys.com>,
<arc-linux-dev@synopsys.com>,
Peter Zijlstra <peterz@infradead.org>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Vineet Gupta <Vineet.Gupta1@synopsys.com>
Subject: [PATCH 1/8] ARC: perf: support RAW events
Date: Tue, 9 Jun 2015 17:49:25 +0530 [thread overview]
Message-ID: <1433852372-29494-2-git-send-email-vgupta@synopsys.com> (raw)
In-Reply-To: <1433852372-29494-1-git-send-email-vgupta@synopsys.com>
From: Alexey Brodkin <abrodkin@synopsys.com>
To run perf against raw event user may issue following command:
--->---
Initializing raw event: crun
Performance counter stats for 'sleep 0':
583202 r6372756e
0.020000000 seconds time elapsed
--->---
"-e rXXX" is indication of raw event to count.
XXX is 64-bit ASCII value.
0x6372756e = crun (in ASCII)
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
arch/arc/include/asm/perf_event.h | 3 +++
arch/arc/kernel/perf_event.c | 54 +++++++++++++++++++++++++++++++++++++++
2 files changed, 57 insertions(+)
diff --git a/arch/arc/include/asm/perf_event.h b/arch/arc/include/asm/perf_event.h
index 2b8880e953a2..ea43477f8a59 100644
--- a/arch/arc/include/asm/perf_event.h
+++ b/arch/arc/include/asm/perf_event.h
@@ -15,6 +15,9 @@
/* real maximum varies per CPU, this is the maximum supported by the driver */
#define ARC_PMU_MAX_HWEVENTS 64
+/* Max number of countable events that CPU may have */
+#define ARC_PERF_MAX_EVENTS 256
+
#define ARC_REG_CC_BUILD 0xF6
#define ARC_REG_CC_INDEX 0x240
#define ARC_REG_CC_NAME0 0x241
diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c
index eea8a7b42e87..400965973bb0 100644
--- a/arch/arc/kernel/perf_event.c
+++ b/arch/arc/kernel/perf_event.c
@@ -22,8 +22,10 @@ struct arc_pmu {
struct pmu pmu;
int counter_size; /* in bits */
int n_counters;
+ int n_events;
unsigned long used_mask[BITS_TO_LONGS(ARC_PMU_MAX_HWEVENTS)];
int ev_hw_idx[PERF_COUNT_ARC_HW_MAX];
+ u64 raw_events[ARC_PERF_MAX_EVENTS];
};
struct arc_callchain_trace {
@@ -136,6 +138,44 @@ static int arc_pmu_cache_event(u64 config)
return ret;
}
+/*
+ * Raw events are specified in hex value of ASCII chars:
+ *
+ * In PCT register CC_NAME{0,1} event name string[] is saved from LSB side:
+ * e.g. cycles corresponds to ARC "crun" and is saved as 0x6e757263
+ * n u r c
+ * However in perf cmdline they are specified in human order as r6372756e
+ *
+ * Thus event from cmdline requires an word swap
+ */
+static int arc_pmu_raw_event(u64 config)
+{
+ int i;
+ char name[sizeof(u64) + 1] = {0};
+ u64 swapped = __swab64(config);
+
+ /* Trim leading zeroes */
+ for (i = 0; i < sizeof(u64); i++)
+ if (!(swapped & 0xFF))
+ swapped = swapped >> 8;
+ else
+ break;
+
+ for (i = 0; i < arc_pmu->n_events; i++) {
+ if (swapped == arc_pmu->raw_events[i])
+ break;
+ }
+
+ if (i == arc_pmu->n_events)
+ return -ENOENT;
+
+ memcpy(name, &swapped, sizeof(u64));
+
+ pr_debug("Initializing raw event: %s\n", name);
+
+ return i;
+}
+
/* initializes hw_perf_event structure if event is supported */
static int arc_pmu_event_init(struct perf_event *event)
{
@@ -159,6 +199,14 @@ static int arc_pmu_event_init(struct perf_event *event)
return ret;
hwc->config = arc_pmu->ev_hw_idx[ret];
return 0;
+
+ case PERF_TYPE_RAW:
+ ret = arc_pmu_raw_event(event->attr.config);
+ if (ret < 0)
+ return ret;
+ hwc->config |= ret;
+ return 0;
+
default:
return -ENOENT;
}
@@ -289,6 +337,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
READ_BCR(ARC_REG_CC_BUILD, cc_bcr);
BUG_ON(!cc_bcr.v); /* Counters exist but No countable conditions ? */
+ BUG_ON(cc_bcr.c > ARC_PERF_MAX_EVENTS);
arc_pmu = devm_kzalloc(&pdev->dev, sizeof(struct arc_pmu), GFP_KERNEL);
if (!arc_pmu)
@@ -300,6 +349,8 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
pr_info("ARC perf\t: %d counters (%d bits), %d countable conditions\n",
arc_pmu->n_counters, arc_pmu->counter_size, cc_bcr.c);
+ arc_pmu->n_events = cc_bcr.c;
+
cc_name.str[8] = 0;
for (i = 0; i < PERF_COUNT_ARC_HW_MAX; i++)
arc_pmu->ev_hw_idx[i] = -1;
@@ -310,6 +361,9 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
cc_name.indiv.word0 = read_aux_reg(ARC_REG_CC_NAME0);
cc_name.indiv.word1 = read_aux_reg(ARC_REG_CC_NAME1);
+ arc_pmu->raw_events[j] = ((u64)cc_name.indiv.word1 << 32) |
+ cc_name.indiv.word0;
+
/* See if it has been mapped to a perf event_id */
for (i = 0; i < ARRAY_SIZE(arc_pmu_ev_hw_map); i++) {
if (arc_pmu_ev_hw_map[i] &&
--
1.9.1
next prev parent reply other threads:[~2015-06-09 12:22 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-09 12:19 [PATCH 0/8] ARCv2 port to Linux - (C) perf Vineet Gupta
2015-06-09 12:19 ` Vineet Gupta [this message]
2015-06-15 15:30 ` [PATCH 1/8] ARC: perf: support RAW events Peter Zijlstra
2015-06-16 11:45 ` Alexey Brodkin
2015-06-17 13:33 ` Peter Zijlstra
2015-06-17 14:10 ` Vineet Gupta
2015-06-22 14:41 ` Peter Zijlstra
2015-06-23 12:20 ` Vineet Gupta
2015-06-17 12:32 ` Vineet Gupta
2015-06-09 12:19 ` [PATCH 2/8] ARC: perf: cap the number of counters to hardware max of 32 Vineet Gupta
2015-06-09 12:19 ` [PATCH 3/8] ARCv2: perf: implement "event_set_period" for future use with interrupts Vineet Gupta
2015-06-15 15:38 ` Peter Zijlstra
2015-06-22 15:26 ` Alexey Brodkin
2015-06-09 12:19 ` [PATCH 4/8] ARCv2: perf: Support sampling events using overflow interrupts Vineet Gupta
2015-06-15 15:48 ` Peter Zijlstra
2015-06-22 15:57 ` Alexey Brodkin
2015-06-15 16:25 ` Peter Zijlstra
2015-06-16 5:37 ` Vineet Gupta
2015-06-16 9:07 ` Peter Zijlstra
2015-06-16 9:33 ` Vineet Gupta
2015-06-17 11:48 ` Vineet Gupta
2015-06-17 12:44 ` Peter Zijlstra
2015-06-09 12:19 ` [PATCH 5/8] ARCv2: perf: set usable max period as a half of real max period Vineet Gupta
2015-06-09 12:19 ` [PATCH 6/8] ARCv2: perf: implement exclusion of event counting in user or kernel mode Vineet Gupta
2015-06-09 12:19 ` [PATCH 7/8] ARCv2: perf: SMP support Vineet Gupta
2015-06-09 12:19 ` [PATCH 8/8] ARCv2: perf: Finally introduce HS perf unit Vineet Gupta
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1433852372-29494-2-git-send-email-vgupta@synopsys.com \
--to=vineet.gupta1@synopsys.com \
--cc=Alexey.Brodkin@synopsys.com \
--cc=acme@kernel.org \
--cc=arc-linux-dev@synopsys.com \
--cc=arnd@arndb.de \
--cc=linux-arch@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=peterz@infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).