linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Andi Kleen <andi@firstfloor.org>
To: acme@kernel.org
Cc: jolsa@kernel.org, linux-kernel@vger.kernel.org,
	eranian@google.com, namhyung@kernel.org, peterz@infradead.org,
	mingo@kernel.org, Andi Kleen <ak@linux.intel.com>
Subject: [PATCH 7/9] x86, perf: Add Top Down events to Intel Atom
Date: Fri,  7 Aug 2015 18:06:23 -0700	[thread overview]
Message-ID: <1438995985-13631-8-git-send-email-andi@firstfloor.org> (raw)
In-Reply-To: <1438995985-13631-1-git-send-email-andi@firstfloor.org>

From: Andi Kleen <ak@linux.intel.com>

Add topdown event declarations to Silvermont / Airmont.
These cores do not support the full Top Down metrics, but an useful
subset (FrontendBound, Retiring, Backend Bound/Bad Speculation).

The perf stat tool automatically handles the missing events
and combines the available metrics.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
 arch/x86/kernel/cpu/perf_event_intel.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 65b58cb..1f08603 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1380,6 +1380,29 @@ static __initconst const u64 atom_hw_cache_event_ids
  },
 };
 
+EVENT_ATTR_STR(topdown-total-slots, td_total_slots_slm, "event=0x3c");
+EVENT_ATTR_STR(topdown-total-slots.scale, td_total_slots_scale_slm, "-2");
+/* no_alloc_cycles.not_delivered */
+EVENT_ATTR_STR(topdown-fetch-bubbles, td_fetch_bubbles_slm,
+	       "event=0xca,umask=0x50");
+EVENT_ATTR_STR(topdown-fetch-bubbles.scale, td_fetch_bubbles_scale_slm, "-2");
+/* uops_retired.all */
+EVENT_ATTR_STR(topdown-slots-issued, td_slots_issued_slm,
+	       "event=0xc2,umask=0x10");
+/* uops_retired.all */
+EVENT_ATTR_STR(topdown-slots-retired, td_slots_retired_slm,
+	       "event=0xc2,umask=0x10");
+
+struct attribute *slm_events_attrs[] = {
+	EVENT_PTR(td_total_slots_slm),
+	EVENT_PTR(td_total_slots_scale_slm),
+	EVENT_PTR(td_fetch_bubbles_slm),
+	EVENT_PTR(td_fetch_bubbles_scale_slm),
+	EVENT_PTR(td_slots_issued_slm),
+	EVENT_PTR(td_slots_retired_slm),
+	NULL
+};
+
 static struct extra_reg intel_slm_extra_regs[] __read_mostly =
 {
 	/* must define OFFCORE_RSP_X first, see intel_fixup_er() */
@@ -3401,6 +3424,7 @@ __init int intel_pmu_init(void)
 		x86_pmu.pebs_constraints = intel_slm_pebs_event_constraints;
 		x86_pmu.extra_regs = intel_slm_extra_regs;
 		x86_pmu.flags |= PMU_FL_HAS_RSP_1;
+		x86_pmu.cpu_events = slm_events_attrs;
 		pr_cont("Silvermont events, ");
 		break;
 
-- 
2.4.3


  parent reply	other threads:[~2015-08-08  1:07 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-08  1:06 Add top down metrics to perf stat Andi Kleen
2015-08-08  1:06 ` [PATCH 1/9] perf, tools: Dont stop PMU parsing on alias parse error Andi Kleen
2015-08-11 13:07   ` Jiri Olsa
2015-08-11 13:14     ` Andi Kleen
2015-08-11 13:24       ` Jiri Olsa
2015-08-11 13:40         ` Andi Kleen
2015-08-11 14:39           ` Jiri Olsa
2015-08-11 16:59             ` Andi Kleen
2015-08-08  1:06 ` [PATCH 2/9] perf, tools, stat: Support up-scaling of events Andi Kleen
2015-08-11 13:25   ` Jiri Olsa
2015-08-11 13:38     ` Andi Kleen
2015-08-11 13:54       ` Jiri Olsa
2015-08-11 17:00         ` Andi Kleen
2015-08-11 17:13           ` Jiri Olsa
2015-08-11 17:17             ` Andi Kleen
2015-08-08  1:06 ` [PATCH 3/9] perf, tools, stat: Basic support for TopDown in perf stat Andi Kleen
2015-08-08  1:06 ` [PATCH 4/9] perf, tools, stat: Add computation of TopDown formulas Andi Kleen
2015-08-08  1:06 ` [PATCH 5/9] x86, perf: Support sysfs files depending on SMT status Andi Kleen
2015-08-08  1:06 ` [PATCH 6/9] x86, perf: Add Top Down events to Intel Core Andi Kleen
2015-08-08  1:06 ` Andi Kleen [this message]
2015-08-08  1:06 ` [PATCH 8/9] perf, tools, stat: Add extra output of counter values with -v Andi Kleen
2015-08-08  1:06 ` [PATCH 9/9] perf, tools, stat: Force --per-core mode for .agg-per-core aliases Andi Kleen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1438995985-13631-8-git-send-email-andi@firstfloor.org \
    --to=andi@firstfloor.org \
    --cc=acme@kernel.org \
    --cc=ak@linux.intel.com \
    --cc=eranian@google.com \
    --cc=jolsa@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@kernel.org \
    --cc=namhyung@kernel.org \
    --cc=peterz@infradead.org \
    --subject='Re: [PATCH 7/9] x86, perf: Add Top Down events to Intel Atom' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).