From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752942AbbHMLhA (ORCPT ); Thu, 13 Aug 2015 07:37:00 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([146.101.78.143]:64395 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752561AbbHMLeh (ORCPT ); Thu, 13 Aug 2015 07:34:37 -0400 From: "Suzuki K. Poulose" To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, marc.zyngier@arm.com, "Suzuki K. Poulose" , Christoffer Dall Subject: [PATCH 08/14] arm64: kvm: Fix {V}TCR_EL2_TG0 mask Date: Thu, 13 Aug 2015 12:33:58 +0100 Message-Id: <1439465645-22584-9-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1439465645-22584-1-git-send-email-suzuki.poulose@arm.com> References: <1439465645-22584-1-git-send-email-suzuki.poulose@arm.com> X-OriginalArrivalTime: 13 Aug 2015 11:34:34.0413 (UTC) FILETIME=[072445D0:01D0D5BC] X-MC-Unique: prdT8BKOSu6oi6ObTeXvXQ-5 Content-Type: text/plain; charset=WINDOWS-1252 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id t7DBbXUk024443 From: "Suzuki K. Poulose" {V}TCR_EL2_TG0 is a 2bit wide field, where: 00 - 4K 01 - 64K 10 - 16K But we use only 1 bit, which has worked well so far since we never cared about 16K. Fix it for 16K support. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Christoffer Dall Cc: kvmarm@lists.cs.columbia.edu Acked-by: Mark Rutland Signed-off-by: Suzuki K. Poulose --- arch/arm64/include/asm/kvm_arm.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index ac6fafb..52dc9cc 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -98,7 +98,7 @@ #define TCR_EL2_TBI (1 << 20) #define TCR_EL2_PS (7 << 16) #define TCR_EL2_PS_40B (2 << 16) -#define TCR_EL2_TG0 (1 << 14) +#define TCR_EL2_TG0 (3 << 14) #define TCR_EL2_SH0 (3 << 12) #define TCR_EL2_ORGN0 (3 << 10) #define TCR_EL2_IRGN0 (3 << 8) @@ -110,7 +110,7 @@ /* VTCR_EL2 Registers bits */ #define VTCR_EL2_PS_MASK (7 << 16) -#define VTCR_EL2_TG0_MASK (1 << 14) +#define VTCR_EL2_TG0_MASK (3 << 14) #define VTCR_EL2_TG0_4K (0 << 14) #define VTCR_EL2_TG0_64K (1 << 14) #define VTCR_EL2_SH0_MASK (3 << 12) -- 1.7.9.5