From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755523AbbIOJlX (ORCPT ); Tue, 15 Sep 2015 05:41:23 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:10537 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752950AbbIOJlH (ORCPT ); Tue, 15 Sep 2015 05:41:07 -0400 From: Xinwei Kong To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFC 8/8] dts: hisilicon: Add drm driver device dts config for HiKey board Date: Tue, 15 Sep 2015 17:37:14 +0800 Message-ID: <1442309834-21420-9-git-send-email-kong.kongxinwei@hisilicon.com> X-Mailer: git-send-email 1.9.4.msysgit.2 In-Reply-To: <1442309834-21420-1-git-send-email-kong.kongxinwei@hisilicon.com> References: <1442309834-21420-1-git-send-email-kong.kongxinwei@hisilicon.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.46.72.58] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds drm dts node for HiKey board using hi6220 SOC. Signed-off-by: Xinliang Liu Signed-off-by: Xinwei Kong Signed-off-by: Andy Green Signed-off-by: Jiwen Qi Signed-off-by: Yu Gong --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34 +++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 3f03380..9ce8c62 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -4,6 +4,7 @@ * Copyright (C) 2015, Hisilicon Ltd. */ +#include #include / { @@ -167,5 +168,38 @@ clocks = <&ao_ctrl 36>, <&ao_ctrl 36>; clock-names = "uartclk", "apb_pclk"; }; + + display-subsystem { + compatible = "hisilicon,display-subsystem"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-coherent; + + ade: ade@f4100000 { + compatible = "hisilicon,hi6220-ade"; + reg = <0x0 0xf4100000 0x0 0x7800>, + <0x0 0xf4410000 0x0 0x1000>; + reg-names = "ade_base", + "media_base"; + interrupts = <0 115 4>; /* ldi interrupt */ + + clocks = <&media_ctrl HI6220_ADE_CORE>, + <&media_ctrl HI6220_CODEC_JPEG>, + <&media_ctrl HI6220_ADE_PIX_SRC>; + /*clock name*/ + clock-names = "clk_ade_core", + "aclk_codec_jpeg_src", + "clk_ade_pix"; + }; + + dsi { + compatible = "hisilicon,hi6220-dsi"; + reg = <0x0 0xf4107800 0x0 0x100>; + clocks = <&media_ctrl HI6220_DSI_PCLK>; + clock-names = "pclk_dsi"; + encoder-slave = <&adv7533>; + }; + }; }; }; -- 1.9.1